1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+faminmax 2>&1 < %s | FileCheck %s 2// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+faminmax 2>&1 < %s | FileCheck %s 3 4// FAMIN: 5// Invalid predicate register 6 7famin z0.h, p8/m, z0.h, z1.h 8// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 9// CHECK-NEXT: famin z0.h, p8/m, z0.h, z1.h 10// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 11 12famin z31.s, p7/z, z31.s, z30.s 13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 14// CHECK-NEXT: famin z31.s, p7/z, z31.s, z30.s 15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 16 17// --------------------------------------------------------------------------// 18// Invalid vector suffix 19 20famin z23.h, p3/m, z23.h, z13.s 21// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 22// CHECK-NEXT: famin z23.h, p3/m, z23.h, z13.s 23// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 24 25famin z23.b, p3/m, z23.d, z13.d 26// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 27// CHECK-NEXT: famin z23.b, p3/m, z23.d, z13.d 28// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 29 30// --------------------------------------------------------------------------// 31// Z register out of range 32 33famin z31.s, p7/z, z31.s, z32.s 34// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 35// CHECK-NEXT: famin z31.s, p7/z, z31.s, z32.s 36// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 37 38famin z0.d, p0/m, z0.d, z35.d 39// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 40// CHECK-NEXT: famin z0.d, p0/m, z0.d, z35.d 41// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 42 43// --------------------------------------------------------------------------// 44// Negative tests for instructions that are incompatible with movprfx 45 46movprfx z20, z31 47famin z23.h, p3/m, z23.h, z13.h 48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination 49// CHECK-NEXT: famin z23.h, p3/m, z23.h, z13.h 50// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 51 52 53// FMAX: 54// Invalid predicate register 55 56famax z0.h, p8/m, z0.h, z1.h 57// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 58// CHECK-NEXT: famax z0.h, p8/m, z0.h, z1.h 59// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 60 61famax z31.s, p7/z, z31.s, z30.s 62// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 63// CHECK-NEXT: famax z31.s, p7/z, z31.s, z30.s 64// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 65 66// --------------------------------------------------------------------------// 67// Invalid vector suffix 68 69famax z23.h, p3/m, z23.h, z13.s 70// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 71// CHECK-NEXT: famax z23.h, p3/m, z23.h, z13.s 72// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 73 74famax z23.b, p3/m, z23.d, z13.d 75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 76// CHECK-NEXT: famax z23.b, p3/m, z23.d, z13.d 77// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 78 79// --------------------------------------------------------------------------// 80// Z register out of range 81 82famax z31.s, p7/z, z31.s, z32.s 83// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 84// CHECK-NEXT: famax z31.s, p7/z, z31.s, z32.s 85// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 86 87famax z0.d, p0/m, z0.d, z35.d 88// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 89// CHECK-NEXT: famax z0.d, p0/m, z0.d, z35.d 90// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 91 92// --------------------------------------------------------------------------// 93// Negative tests for instructions that are incompatible with movprfx 94 95movprfx z20, z31 96famax z23.h, p3/m, z23.h, z13.h 97// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination 98// CHECK-NEXT: famax z23.h, p3/m, z23.h, z13.h 99// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: