1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals --global-value-regex "![0-9]+" --version 2 2; Test -hwasan-with-ifunc flag. 3; 4; RUN: opt -passes=hwasan -S < %s | FileCheck %s 5; RUN: opt -passes=hwasan -S -hwasan-mapping-offset-dynamic=tls -hwasan-record-stack-history=instr < %s | FileCheck %s --check-prefixes=NOIFUNC-TLS-HISTORY 6; RUN: opt -passes=hwasan -S -hwasan-mapping-offset-dynamic=tls -hwasan-record-stack-history=none < %s | FileCheck %s --check-prefixes=NOIFUNC-TLS-NOHISTORY 7; RUN: opt -passes=hwasan -S -hwasan-mapping-offset-dynamic=global -hwasan-with-frame-record=0 < %s | FileCheck %s --check-prefixes=NOIFUNC-NOTLS 8; RUN: opt -passes=hwasan -S -hwasan-mapping-offset-dynamic=ifunc -hwasan-with-frame-record=0 < %s | FileCheck %s --check-prefixes=IFUNC-NOTLS 9; RUN: opt -passes=hwasan -S -mtriple=aarch64-fuchsia < %s | FileCheck %s --check-prefixes=FUCHSIA 10; RUN: opt -passes=hwasan -S -mtriple=aarch64-fuchsia -hwasan-record-stack-history=libcall < %s | FileCheck %s --check-prefixes=FUCHSIA-LIBCALL 11 12target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 13target triple = "aarch64--linux-android22" 14 15 16define i32 @test_load(ptr %a) sanitize_hwaddress { 17; First instrumentation in the function must be to load the dynamic shadow 18; address into a local variable. 19; "store i64" is only used to update stack history (this input IR intentionally does not use any i64) 20; W/o any allocas, the history is not updated, even if it is enabled explicitly with -hwasan-record-stack-history=1 21; CHECK-LABEL: define i32 @test_load 22; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 23; CHECK-NEXT: entry: 24; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 25; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2) 26; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 27; CHECK-NEXT: ret i32 [[X]] 28; 29; NOIFUNC-TLS-HISTORY-LABEL: define i32 @test_load 30; NOIFUNC-TLS-HISTORY-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 31; NOIFUNC-TLS-HISTORY-NEXT: entry: 32; NOIFUNC-TLS-HISTORY-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 33; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2) 34; NOIFUNC-TLS-HISTORY-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 35; NOIFUNC-TLS-HISTORY-NEXT: ret i32 [[X]] 36; 37; NOIFUNC-TLS-NOHISTORY-LABEL: define i32 @test_load 38; NOIFUNC-TLS-NOHISTORY-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 39; NOIFUNC-TLS-NOHISTORY-NEXT: entry: 40; NOIFUNC-TLS-NOHISTORY-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 41; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2) 42; NOIFUNC-TLS-NOHISTORY-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 43; NOIFUNC-TLS-NOHISTORY-NEXT: ret i32 [[X]] 44; 45; NOIFUNC-NOTLS-LABEL: define i32 @test_load 46; NOIFUNC-NOTLS-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 47; NOIFUNC-NOTLS-NEXT: entry: 48; NOIFUNC-NOTLS-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8 49; NOIFUNC-NOTLS-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP0]], ptr [[A]], i32 2) 50; NOIFUNC-NOTLS-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 51; NOIFUNC-NOTLS-NEXT: ret i32 [[X]] 52; 53; IFUNC-NOTLS-LABEL: define i32 @test_load 54; IFUNC-NOTLS-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 55; IFUNC-NOTLS-NEXT: entry: 56; IFUNC-NOTLS-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 57; IFUNC-NOTLS-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2) 58; IFUNC-NOTLS-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 59; IFUNC-NOTLS-NEXT: ret i32 [[X]] 60; 61; FUCHSIA-LABEL: define i32 @test_load 62; FUCHSIA-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 63; FUCHSIA-NEXT: entry: 64; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) 65; FUCHSIA-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 2, i64 0) 66; FUCHSIA-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 67; FUCHSIA-NEXT: ret i32 [[X]] 68; 69; FUCHSIA-LIBCALL-LABEL: define i32 @test_load 70; FUCHSIA-LIBCALL-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { 71; FUCHSIA-LIBCALL-NEXT: entry: 72; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) 73; FUCHSIA-LIBCALL-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 2, i64 0) 74; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4 75; FUCHSIA-LIBCALL-NEXT: ret i32 [[X]] 76; 77entry: 78 %x = load i32, ptr %a, align 4 79 ret i32 %x 80} 81 82declare void @use(ptr %p) 83 84define void @test_alloca() sanitize_hwaddress { 85; First instrumentation in the function must be to load the dynamic shadow 86; address into a local variable. 87; When watching stack history, all code paths attempt to get PC and SP and mix them together. 88; CHECK-LABEL: define void @test_alloca 89; CHECK-SAME: () #[[ATTR0]] { 90; CHECK-NEXT: entry: 91; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() 92; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 93; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 94; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 95; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) 96; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 97; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 98; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 99; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] 100; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr 101; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 102; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 103; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 104; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 105; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 106; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] 107; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 108; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 109; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 110; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr 111; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 112; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 113; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 114; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 115; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 116; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 117; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] 118; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr 119; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 120; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 121; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935 122; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4 123; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]] 124; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false) 125; CHECK-NEXT: call void @use(ptr [[X_HWASAN]]) 126; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 127; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 128; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935 129; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4 130; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]] 131; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false) 132; CHECK-NEXT: ret void 133; 134; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca 135; NOIFUNC-TLS-HISTORY-SAME: () #[[ATTR0]] { 136; NOIFUNC-TLS-HISTORY-NEXT: entry: 137; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() 138; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 139; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 140; NOIFUNC-TLS-HISTORY-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 141; NOIFUNC-TLS-HISTORY-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) 142; NOIFUNC-TLS-HISTORY-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 143; NOIFUNC-TLS-HISTORY-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 144; NOIFUNC-TLS-HISTORY-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 145; NOIFUNC-TLS-HISTORY-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] 146; NOIFUNC-TLS-HISTORY-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr 147; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 148; NOIFUNC-TLS-HISTORY-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 149; NOIFUNC-TLS-HISTORY-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 150; NOIFUNC-TLS-HISTORY-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 151; NOIFUNC-TLS-HISTORY-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 152; NOIFUNC-TLS-HISTORY-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] 153; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 154; NOIFUNC-TLS-HISTORY-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 155; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 156; NOIFUNC-TLS-HISTORY-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr 157; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 158; NOIFUNC-TLS-HISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 159; NOIFUNC-TLS-HISTORY-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 160; NOIFUNC-TLS-HISTORY-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 161; NOIFUNC-TLS-HISTORY-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 162; NOIFUNC-TLS-HISTORY-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 163; NOIFUNC-TLS-HISTORY-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] 164; NOIFUNC-TLS-HISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr 165; NOIFUNC-TLS-HISTORY-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 166; NOIFUNC-TLS-HISTORY-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 167; NOIFUNC-TLS-HISTORY-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935 168; NOIFUNC-TLS-HISTORY-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4 169; NOIFUNC-TLS-HISTORY-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]] 170; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false) 171; NOIFUNC-TLS-HISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) 172; NOIFUNC-TLS-HISTORY-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 173; NOIFUNC-TLS-HISTORY-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 174; NOIFUNC-TLS-HISTORY-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935 175; NOIFUNC-TLS-HISTORY-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4 176; NOIFUNC-TLS-HISTORY-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]] 177; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false) 178; NOIFUNC-TLS-HISTORY-NEXT: ret void 179; 180; NOIFUNC-TLS-NOHISTORY-LABEL: define void @test_alloca 181; NOIFUNC-TLS-NOHISTORY-SAME: () #[[ATTR0]] { 182; NOIFUNC-TLS-NOHISTORY-NEXT: entry: 183; NOIFUNC-TLS-NOHISTORY-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 184; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 185; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 186; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 187; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] 188; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 189; NOIFUNC-TLS-NOHISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 190; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 191; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 192; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935 193; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 194; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] 195; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr 196; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 197; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64 198; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935 199; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4 200; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]] 201; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false) 202; NOIFUNC-TLS-NOHISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) 203; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 204; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 205; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935 206; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4 207; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]] 208; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false) 209; NOIFUNC-TLS-NOHISTORY-NEXT: ret void 210; 211; NOIFUNC-NOTLS-LABEL: define void @test_alloca 212; NOIFUNC-NOTLS-SAME: () #[[ATTR0]] { 213; NOIFUNC-NOTLS-NEXT: entry: 214; NOIFUNC-NOTLS-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8 215; NOIFUNC-NOTLS-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 216; NOIFUNC-NOTLS-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 217; NOIFUNC-NOTLS-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20 218; NOIFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP3]] 219; NOIFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 220; NOIFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 221; NOIFUNC-NOTLS-NEXT: [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 222; NOIFUNC-NOTLS-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 223; NOIFUNC-NOTLS-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935 224; NOIFUNC-NOTLS-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 56 225; NOIFUNC-NOTLS-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]] 226; NOIFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr 227; NOIFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 228; NOIFUNC-NOTLS-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64 229; NOIFUNC-NOTLS-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935 230; NOIFUNC-NOTLS-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4 231; NOIFUNC-NOTLS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP12]] 232; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false) 233; NOIFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) 234; NOIFUNC-NOTLS-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 235; NOIFUNC-NOTLS-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64 236; NOIFUNC-NOTLS-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935 237; NOIFUNC-NOTLS-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4 238; NOIFUNC-NOTLS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP17]] 239; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false) 240; NOIFUNC-NOTLS-NEXT: ret void 241; 242; IFUNC-NOTLS-LABEL: define void @test_alloca 243; IFUNC-NOTLS-SAME: () #[[ATTR0]] { 244; IFUNC-NOTLS-NEXT: entry: 245; IFUNC-NOTLS-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) 246; IFUNC-NOTLS-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 247; IFUNC-NOTLS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 248; IFUNC-NOTLS-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 249; IFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] 250; IFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 251; IFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 252; IFUNC-NOTLS-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 253; IFUNC-NOTLS-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 254; IFUNC-NOTLS-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935 255; IFUNC-NOTLS-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 256; IFUNC-NOTLS-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] 257; IFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr 258; IFUNC-NOTLS-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 259; IFUNC-NOTLS-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64 260; IFUNC-NOTLS-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935 261; IFUNC-NOTLS-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4 262; IFUNC-NOTLS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]] 263; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false) 264; IFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) 265; IFUNC-NOTLS-NEXT: [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 266; IFUNC-NOTLS-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 267; IFUNC-NOTLS-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935 268; IFUNC-NOTLS-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4 269; IFUNC-NOTLS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]] 270; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false) 271; IFUNC-NOTLS-NEXT: ret void 272; 273; FUCHSIA-LABEL: define void @test_alloca 274; FUCHSIA-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk { 275; FUCHSIA-NEXT: entry: 276; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) 277; FUCHSIA-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 278; FUCHSIA-NEXT: [[TMP1:%.*]] = ashr i64 [[TMP0]], 3 279; FUCHSIA-NEXT: [[TMP2:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) 280; FUCHSIA-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 281; FUCHSIA-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 282; FUCHSIA-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 283; FUCHSIA-NEXT: [[TMP6:%.*]] = or i64 [[TMP2]], [[TMP5]] 284; FUCHSIA-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP0]] to ptr 285; FUCHSIA-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 286; FUCHSIA-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 287; FUCHSIA-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 288; FUCHSIA-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 289; FUCHSIA-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 290; FUCHSIA-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] 291; FUCHSIA-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 292; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 293; FUCHSIA-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 294; FUCHSIA-NEXT: [[TMP13:%.*]] = xor i64 [[TMP1]], 0 295; FUCHSIA-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 296; FUCHSIA-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935 297; FUCHSIA-NEXT: [[TMP16:%.*]] = shl i64 [[TMP13]], 56 298; FUCHSIA-NEXT: [[TMP17:%.*]] = or i64 [[TMP15]], [[TMP16]] 299; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr 300; FUCHSIA-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8 301; FUCHSIA-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 302; FUCHSIA-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 303; FUCHSIA-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4 304; FUCHSIA-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr 305; FUCHSIA-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP22]], i32 0 306; FUCHSIA-NEXT: store i8 4, ptr [[TMP23]], align 1 307; FUCHSIA-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[X]], i32 15 308; FUCHSIA-NEXT: store i8 [[TMP18]], ptr [[TMP24]], align 1 309; FUCHSIA-NEXT: call void @use(ptr [[X_HWASAN]]) 310; FUCHSIA-NEXT: [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 311; FUCHSIA-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64 312; FUCHSIA-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 313; FUCHSIA-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 314; FUCHSIA-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr 315; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false) 316; FUCHSIA-NEXT: ret void 317; 318; FUCHSIA-LIBCALL-LABEL: define void @test_alloca 319; FUCHSIA-LIBCALL-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk { 320; FUCHSIA-LIBCALL-NEXT: entry: 321; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) 322; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) 323; FUCHSIA-LIBCALL-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 324; FUCHSIA-LIBCALL-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 325; FUCHSIA-LIBCALL-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 44 326; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = or i64 [[TMP0]], [[TMP3]] 327; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP4]]) 328; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 20 329; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP5]] 330; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 331; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 332; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 333; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 334; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], 72057594037927935 335; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 56 336; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] 337; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr 338; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 339; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64 340; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 72057594037927935 341; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4 342; FUCHSIA-LIBCALL-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr 343; FUCHSIA-LIBCALL-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP15]], i32 0 344; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP16]], align 1 345; FUCHSIA-LIBCALL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[X]], i32 15 346; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP11]], ptr [[TMP17]], align 1 347; FUCHSIA-LIBCALL-NEXT: call void @use(ptr [[X_HWASAN]]) 348; FUCHSIA-LIBCALL-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 349; FUCHSIA-LIBCALL-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 350; FUCHSIA-LIBCALL-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 351; FUCHSIA-LIBCALL-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4 352; FUCHSIA-LIBCALL-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr 353; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP18]], i64 1, i1 false) 354; FUCHSIA-LIBCALL-NEXT: ret void 355; 356entry: 357 %x = alloca i32, align 4 358 call void @use(ptr %x) 359 ret void 360} 361 362