1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2; Test allocas with multiple lifetime ends, as frequently seen for exception 3; handling. 4; 5; RUN: opt -passes=hwasan -hwasan-use-after-scope -S -o - %s | FileCheck %s 6 7target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 8target triple = "aarch64--linux-android" 9 10declare void @mayFail(ptr %x) sanitize_hwaddress 11declare void @onExcept(ptr %x) sanitize_hwaddress 12 13declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind 14declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind 15declare i32 @__gxx_personality_v0(...) 16 17define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 { 18; CHECK-LABEL: define void @test 19; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { 20; CHECK-NEXT: entry: 21; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() 22; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 23; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 24; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 25; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) 26; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 27; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 28; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 29; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] 30; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr 31; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 32; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 33; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 34; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 35; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 36; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] 37; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 38; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 39; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 40; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr 41; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 42; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 43; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 44; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 45; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 46; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 47; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] 48; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr 49; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8 50; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 51; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]]) 52; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 53; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 54; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935 55; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4 56; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]] 57; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false) 58; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]]) 59; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 60; CHECK: invoke.cont: 61; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 62; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 63; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935 64; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4 65; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]] 66; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false) 67; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) 68; CHECK-NEXT: ret void 69; CHECK: lpad: 70; CHECK-NEXT: [[TMP32:%.*]] = landingpad { ptr, i32 } 71; CHECK-NEXT: cleanup 72; CHECK-NEXT: [[TMP33:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]]) 73; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP33]]) 74; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0 75; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19) 76; CHECK-NEXT: store ptr [[TMP34]], ptr [[EXN_SLOT]], align 8 77; CHECK-NEXT: [[TMP35:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1 78; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18) 79; CHECK-NEXT: store i32 [[TMP35]], ptr [[EHSELECTOR_SLOT]], align 4 80; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]]) 81; CHECK-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 82; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[X]] to i64 83; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935 84; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4 85; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP39]] 86; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false) 87; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) 88; CHECK-NEXT: br label [[EH_RESUME:%.*]] 89; CHECK: eh.resume: 90; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 3) 91; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8 92; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 2) 93; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4 94; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0 95; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 96; CHECK-NEXT: resume { ptr, i32 } [[LPAD_VAL1]] 97; 98entry: 99 %x = alloca i32, align 8 100 %exn.slot = alloca ptr, align 8 101 %ehselector.slot = alloca i32, align 4 102 call void @llvm.lifetime.start.p0(i64 8, ptr %x) 103 invoke void @mayFail(ptr %x) to label %invoke.cont unwind label %lpad 104 105invoke.cont: ; preds = %entry 106 107 call void @llvm.lifetime.end.p0(i64 8, ptr %x) 108 ret void 109 110lpad: ; preds = %entry 111 112 %0 = landingpad { ptr, i32 } 113 cleanup 114 %1 = extractvalue { ptr, i32 } %0, 0 115 store ptr %1, ptr %exn.slot, align 8 116 %2 = extractvalue { ptr, i32 } %0, 1 117 store i32 %2, ptr %ehselector.slot, align 4 118 call void @onExcept(ptr %x) #18 119 call void @llvm.lifetime.end.p0(i64 8, ptr %x) 120 br label %eh.resume 121 122eh.resume: ; preds = %lpad 123 %exn = load ptr, ptr %exn.slot, align 8 124 %sel = load i32, ptr %ehselector.slot, align 4 125 %lpad.val = insertvalue { ptr, i32 } undef, ptr %exn, 0 126 %lpad.val1 = insertvalue { ptr, i32 } %lpad.val, i32 %sel, 1 127 resume { ptr, i32 } %lpad.val1 128} 129