1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2; Test alloca instrumentation when tags are generated by HWASan function. 3; 4; RUN: opt < %s -passes=hwasan -hwasan-generate-tags-with-calls -S | FileCheck %s 5 6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 7target triple = "riscv64-unknown-linux" 8 9declare void @use32(ptr) 10 11define void @test_alloca() sanitize_hwaddress { 12; CHECK-LABEL: define void @test_alloca 13; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk { 14; CHECK-NEXT: entry: 15; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 16; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935 17; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 18; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) 19; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 20; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 21; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]] 22; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr 23; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 24; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 25; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 26; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 27; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 28; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] 29; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 30; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 31; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 32; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr 33; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 34; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 35; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag() 36; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64 37; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 38; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935 39; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 56 40; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]] 41; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr 42; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 43; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64 44; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935 45; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4 46; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]] 47; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0 48; CHECK-NEXT: store i8 4, ptr [[TMP26]], align 1 49; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15 50; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1 51; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) 52; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 53; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64 54; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935 55; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4 56; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]] 57; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false) 58; CHECK-NEXT: ret void 59; 60 61entry: 62 %x = alloca i32, align 4 63 call void @use32(ptr nonnull %x) 64 ret void 65} 66