1; RUN: opt < %s -passes=dfsan -S | FileCheck %s 2target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 3target triple = "x86_64-unknown-linux-gnu" 4 5define <4 x i4> @pass_vector(<4 x i4> %v) { 6 ; CHECK-LABEL: @pass_vector.dfsan 7 ; CHECK-NEXT: %[[#REG:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN:2]] 8 ; CHECK-NEXT: store i8 %[[#REG]], ptr @__dfsan_retval_tls, align [[ALIGN]] 9 ; CHECK-NEXT: ret <4 x i4> %v 10 ret <4 x i4> %v 11} 12 13define void @load_update_store_vector(ptr %p) { 14 ; CHECK-LABEL: @load_update_store_vector.dfsan 15 ; CHECK: {{.*}} = load i8, ptr @__dfsan_arg_tls, align 2 16 17 %v = load <4 x i4>, ptr %p 18 %e2 = extractelement <4 x i4> %v, i32 2 19 %v1 = insertelement <4 x i4> %v, i4 %e2, i32 0 20 store <4 x i4> %v1, ptr %p 21 ret void 22} 23 24define <4 x i1> @icmp_vector(<4 x i8> %a, <4 x i8> %b) { 25 ; CHECK-LABEL: @icmp_vector.dfsan 26 ; CHECK-NEXT: %[[B:.*]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN:2]] 27 ; CHECK-NEXT: %[[A:.*]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]] 28 ; CHECK: %[[L:.*]] = or i8 %[[A]], %[[B]] 29 30 ; CHECK: %r = icmp eq <4 x i8> %a, %b 31 ; CHECK: store i8 %[[L]], ptr @__dfsan_retval_tls, align [[ALIGN]] 32 ; CHECK: ret <4 x i1> %r 33 34 %r = icmp eq <4 x i8> %a, %b 35 ret <4 x i1> %r 36} 37 38define <2 x i32> @const_vector() { 39 ; CHECK-LABEL: @const_vector.dfsan 40 ; CHECK-NEXT: store i8 0, ptr @__dfsan_retval_tls, align 2 41 ; CHECK-NEXT: ret <2 x i32> <i32 42, i32 11> 42 43 ret <2 x i32> < i32 42, i32 11 > 44} 45 46define <4 x i4> @call_vector(<4 x i4> %v) { 47 ; CHECK-LABEL: @call_vector.dfsan 48 ; CHECK-NEXT: %[[V:.*]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN:2]] 49 ; CHECK-NEXT: store i8 %[[V]], ptr @__dfsan_arg_tls, align [[ALIGN]] 50 ; CHECK-NEXT: %r = call <4 x i4> @pass_vector.dfsan(<4 x i4> %v) 51 ; CHECK-NEXT: %_dfsret = load i8, ptr @__dfsan_retval_tls, align [[ALIGN]] 52 ; CHECK-NEXT: store i8 %_dfsret, ptr @__dfsan_retval_tls, align [[ALIGN]] 53 ; CHECK-NEXT: ret <4 x i4> %r 54 55 %r = call <4 x i4> @pass_vector(<4 x i4> %v) 56 ret <4 x i4> %r 57} 58