1; RUN: opt < %s -passes=dfsan -dfsan-track-origins=1 -S | FileCheck %s 2; RUN: opt < %s -passes=dfsan -dfsan-track-origins=1 -dfsan-combine-pointer-labels-on-store -S | FileCheck %s --check-prefixes=CHECK,COMBINE_STORE_PTR 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 4target triple = "x86_64-unknown-linux-gnu" 5 6define void @store_zero_to_non_escaped_alloca() { 7 ; CHECK-LABEL: @store_zero_to_non_escaped_alloca.dfsan 8 ; CHECK-NEXT: [[A:%.*]] = alloca i8, align 1 9 ; CHECK-NEXT: %_dfsa = alloca i32, align 4 10 ; CHECK-NEXT: %p = alloca i16, align 2 11 ; CHECK-NEXT: store i8 0, ptr [[A]], align 1 12 ; CHECK-NEXT: store i16 1, ptr %p, align 2 13 ; CHECK-NEXT: ret void 14 15 %p = alloca i16 16 store i16 1, ptr %p 17 ret void 18} 19 20define void @store_nonzero_to_non_escaped_alloca(i16 %a) { 21 ; CHECK-LABEL: @store_nonzero_to_non_escaped_alloca.dfsan 22 ; CHECK: %[[#AO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4 23 ; CHECK: %_dfsa = alloca i32, align 4 24 ; CHECK: store i32 %[[#AO]], ptr %_dfsa, align 4 25 26 %p = alloca i16 27 store i16 %a, ptr %p 28 ret void 29} 30 31declare void @foo(ptr %p) 32 33define void @store_zero_to_escaped_alloca() { 34 ; CHECK-LABEL: @store_zero_to_escaped_alloca.dfsan 35 ; CHECK: store i16 0, ptr {{.*}}, align 1 36 ; CHECK-NEXT: store i16 1, ptr %p, align 2 37 ; CHECK-NEXT: store i8 0, ptr @__dfsan_arg_tls, align [[ALIGN:2]] 38 ; CHECK-NEXT: call void @foo.dfsan(ptr %p) 39 40 %p = alloca i16 41 store i16 1, ptr %p 42 call void @foo(ptr %p) 43 ret void 44} 45 46define void @store_nonzero_to_escaped_alloca(i16 %a) { 47 ; CHECK-LABEL: @store_nonzero_to_escaped_alloca.dfsan 48 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4 49 ; CHECK-NEXT: %[[#AS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]] 50 ; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64 51 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]] 52 ; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr 53 ; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#%.10d,ORIGIN_BASE:]] 54 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4 55 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr 56 ; CHECK: %_dfscmp = icmp ne i8 %[[#AS]], 0 57 ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]], 58 ; CHECK: [[L1]]: 59 ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]]) 60 ; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#ORIGIN_PTR]], align 4 61 ; CHECK-NEXT: br label %[[L2]] 62 ; CHECK: [[L2]]: 63 ; CHECK-NEXT: store i16 %a, ptr %p, align 2 64 65 %p = alloca i16 66 store i16 %a, ptr %p 67 call void @foo(ptr %p) 68 ret void 69} 70 71define void @store64_align8(ptr %p, i64 %a) { 72 ; CHECK-LABEL: @store64_align8.dfsan 73 74 ; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4 75 ; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]] 76 77 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4 78 ; CHECK-NEXT: %[[#AS:]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]] 79 80 ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i8 %[[#AS]], %[[#PS]] 81 ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i8 %[[#PS]], 0 82 ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]] 83 84 ; CHECK: %_dfscmp = icmp ne i8 %[[#AS]], 0 85 ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]], 86 ; CHECK: [[L1]]: 87 ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]]) 88 ; CHECK-NEXT: %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64 89 ; CHECK-NEXT: %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32 90 ; CHECK-NEXT: %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]] 91 ; CHECK-NEXT: store i64 %[[#NO2]], ptr {{.*}}, align 8 92 ; CHECK-NEXT: br label %[[L2]] 93 ; CHECK: [[L2]]: 94 ; CHECK-NEXT: store i64 %a, ptr %p, align 8 95 96 store i64 %a, ptr %p 97 ret void 98} 99 100define void @store64_align2(ptr %p, i64 %a) { 101 ; CHECK-LABEL: @store64_align2.dfsan 102 103 ; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4 104 ; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]] 105 106 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4 107 ; CHECK-NEXT: %[[#AS:]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]] 108 109 ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i8 %[[#AS]], %[[#PS]] 110 ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i8 %[[#PS]], 0 111 ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]] 112 113 ; CHECK: %_dfscmp = icmp ne i8 %[[#AS]], 0 114 ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]], 115 ; CHECK: [[L1]]: 116 ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]]) 117 ; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR0:]], align 4 118 ; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, ptr %[[#O_PTR0]], i32 1 119 ; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR1]], align 4 120 ; CHECK: [[L2]]: 121 ; CHECK-NEXT: store i64 %a, ptr %p, align 2 122 123 store i64 %a, ptr %p, align 2 124 ret void 125} 126 127define void @store96_align8(ptr %p, i96 %a) { 128 ; CHECK-LABEL: @store96_align8.dfsan 129 130 ; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4 131 ; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]] 132 133 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4 134 ; CHECK-NEXT: %[[#AS:]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]] 135 136 ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i8 %[[#AS]], %[[#PS]] 137 ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i8 %[[#PS]], 0 138 ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]] 139 140 ; CHECK: %_dfscmp = icmp ne i8 %[[#AS]], 0 141 ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]], 142 ; CHECK: [[L1]]: 143 ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]]) 144 ; CHECK-NEXT: %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64 145 ; CHECK-NEXT: %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32 146 ; CHECK-NEXT: %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]] 147 ; CHECK-NEXT: store i64 %[[#NO2]], ptr %[[#O_PTR0:]], align 8 148 ; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, ptr %[[#O_PTR0]], i32 2 149 ; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR1]], align 8 150 ; CHECK: [[L2]]: 151 ; CHECK-NEXT: store i96 %a, ptr %p, align 8 152 153 store i96 %a, ptr %p, align 8 154 ret void 155} 156