1; Test memory intrinsics instrumentation 2 3; RUN: opt < %s -passes=asan -S | FileCheck --check-prefixes=CHECK,CHECK-PREFIX %s 4; RUN: opt < %s -passes=asan -asan-kernel -S | FileCheck --check-prefixes=CHECK,CHECK-NOPREFIX %s 5; RUN: opt < %s -passes=asan -asan-kernel -asan-kernel-mem-intrinsic-prefix -S | FileCheck --check-prefixes=CHECK,CHECK-PREFIX %s 6; RUN: opt < %s -passes=asan -S -mtriple=s390x-unknown-linux | FileCheck --check-prefix=EXT %s 7; RUN: opt < %s -passes=asan -S -mtriple=mips-linux-gnu | FileCheck --check-prefix=MIPS_EXT %s 8; RUN: opt < %s -passes=asan -S -mtriple=loongarch64-unknown-linux-gnu | FileCheck --check-prefix=LA_EXT %s 9; REQUIRES: x86-registered-target, systemz-registered-target, mips-registered-target, loongarch-registered-target 10 11target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 12target triple = "x86_64-unknown-linux-gnu" 13 14declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind 15declare void @llvm.memset.inline.p0.i64(ptr nocapture, i8, i64, i1) nounwind 16declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) nounwind 17declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) nounwind 18declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) nounwind 19 20define void @memintr_test(ptr %a, ptr %b) nounwind uwtable sanitize_address { 21 entry: 22 tail call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 100, i1 false) 23 tail call void @llvm.memmove.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false) 24 tail call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false) 25 ret void 26} 27; CHECK-LABEL: memintr_test 28; CHECK-PREFIX: @__asan_memset 29; CHECK-PREFIX: @__asan_memmove 30; CHECK-PREFIX: @__asan_memcpy 31; CHECK-NOPREFIX: @memset 32; CHECK-NOPREFIX: @memmove 33; CHECK-NOPREFIX: @memcpy 34; CHECK: ret void 35 36define void @memintr_inline_test(ptr %a, ptr %b) nounwind uwtable sanitize_address { 37 entry: 38 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 100, i1 false) 39 tail call void @llvm.memcpy.inline.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false) 40 ret void 41} 42; CHECK-LABEL: memintr_inline_test 43; CHECK-PREFIX: @__asan_memset 44; CHECK-PREFIX: @__asan_memcpy 45; CHECK-NOPREFIX: @memset 46; CHECK-NOPREFIX: @memcpy 47; CHECK: ret void 48 49define void @memintr_test_nosanitize(ptr %a, ptr %b) nounwind uwtable { 50 entry: 51 tail call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 100, i1 false) 52 tail call void @llvm.memmove.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false) 53 tail call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false) 54 ret void 55} 56; CHECK-LABEL: memintr_test_nosanitize 57; CHECK: @llvm.memset 58; CHECK: @llvm.memmove 59; CHECK: @llvm.memcpy 60; CHECK: ret void 61 62declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture writeonly, i8, i64, i32) nounwind 63declare void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind 64declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind 65 66define void @memintr_element_atomic_test(ptr %a, ptr %b) nounwind uwtable sanitize_address { 67 ; This is a canary test to make sure that these don't get lowered into calls that don't 68 ; have the element-atomic property. Eventually, asan will have to be enhanced to lower 69 ; these properly. 70 ; CHECK-LABEL: memintr_element_atomic_test 71 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %a, i8 0, i64 100, i32 1) 72 ; CHECK-NEXT: tail call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 100, i32 1) 73 ; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 100, i32 1) 74 ; CHECK-NEXT: ret void 75 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %a, i8 0, i64 100, i32 1) 76 tail call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 100, i32 1) 77 tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 100, i32 1) 78 ret void 79} 80 81; CHECK-PREFIX: declare ptr @__asan_memset(ptr, i32, i64) 82; EXT: declare ptr @__asan_memset(ptr, i32 zeroext, i64) 83; MIPS_EXT: declare ptr @__asan_memset(ptr, i32 signext, i64) 84; LA_EXT: declare ptr @__asan_memset(ptr, i32 signext, i64) 85