xref: /llvm-project/llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir (revision 92b33822e989884d29465d34769b07d78aeb1a84)
1# RUN: llc %s -o - -experimental-debug-variable-locations=true \
2# RUN:     -run-pass=livedebugvalues  | \
3# RUN: FileCheck %s --implicit-check-not=DBG_VALUE
4#
5# Copy of follow-spill-of-live-value.mir. Test that if we have a variable
6# location with the indirect flag set (i.e. DBG_VALUE $blah, 0...) then when we
7# restore that register in the case of a clobber, we keep the indirectness flag.
8#
9## Capture variable num,
10# CHECK: ![[VARNUM:[0-9]+]] = !DILocalVariable
11#
12# CHECK-LABEL: bb.0.entry:
13# CHECK:       DBG_VALUE $r10, 0, ![[VARNUM]], !DIExpression(DW_OP_LLVM_fragment, 64, 64),
14# CHECK:       DBG_VALUE $rsp, 0, ![[VARNUM]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_LLVM_fragment, 64, 64),
15# CHECK:       DBG_VALUE $r10, 0, ![[VARNUM]], !DIExpression(DW_OP_LLVM_fragment, 64, 64),
16
17--- |
18  ; ModuleID = 'missingvar.ll'
19  source_filename = "/fast/fs/llvm34/lib/Analysis/LoopPass.cpp"
20  target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
21  target triple = "x86_64-unknown-linux-gnu"
22
23  define linkonce_odr void @_ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_() local_unnamed_addr align 2 !dbg !3 {
24  entry:
25    call void @llvm.dbg.value(metadata i32 0, metadata !8, metadata !DIExpression()), !dbg !7
26    ret void
27  }
28
29  declare void @llvm.dbg.value(metadata, metadata, metadata)
30
31  !llvm.module.flags = !{!0}
32  !llvm.dbg.cu = !{!1}
33
34  !0 = !{i32 2, !"Debug Info Version", i32 3}
35  !1 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !2, producer: "beards", isOptimized: true, runtimeVersion: 4, emissionKind: FullDebug)
36  !2 = !DIFile(filename: "bees.cpp", directory: "")
37  !3 = distinct !DISubprogram(name: "nope", scope: !2, file: !2, line: 1, type: !4, spFlags: DISPFlagDefinition, unit: !1)
38  !4 = !DISubroutineType(types: !5)
39  !5 = !{!6}
40  !6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
41  !7 = !DILocation(line: 1, scope: !3)
42  !8 = !DILocalVariable(name: "flannel", scope: !3)
43
44...
45---
46name:            _ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_
47alignment:       16
48tracksRegLiveness: true
49debugInstrRef: true
50liveins:
51  - { reg: '$rdi' }
52  - { reg: '$rsi' }
53  - { reg: '$rdx' }
54frameInfo:
55  stackSize:       48
56  offsetAdjustment: -48
57  maxAlignment:    8
58  maxCallFrameSize: 0
59  cvBytesOfCalleeSavedRegisters: 48
60fixedStack:
61  - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, callee-saved-register: '$rbx' }
62  - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, callee-saved-register: '$r12' }
63  - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, callee-saved-register: '$r13' }
64  - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '$r14' }
65  - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$r15' }
66  - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '$rbp' }
67stack:
68  - { id: 0, type: spill-slot, offset: -64, size: 8, alignment: 8 }
69machineFunctionInfo: {}
70body:             |
71  bb.0.entry:
72    liveins: $rdi, $rdx, $rsi, $rbp, $r15, $r14, $r13, $r12, $rbx
73
74    renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `ptr undef`)
75    renamable $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
76    DBG_VALUE $r10, 0, !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !7
77    TEST8rr renamable $al, renamable $al, implicit-def $eflags, implicit killed $eax, debug-location !7
78    MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $r10 :: (store 8 into %stack.0)
79    MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rdi :: (store 8 into %stack.0)
80    RET64
81...
82