1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s 3 4; 5; SimplifyDemandedVectorEltsForTargetNode Handling 6; 7 8define <16 x i8> @demandedelts_vpshab(<16 x i8> %a0, <16 x i8> %a1) { 9; CHECK-LABEL: demandedelts_vpshab: 10; CHECK: # %bb.0: 11; CHECK-NEXT: vpshab %xmm1, %xmm0, %xmm0 12; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1 13; CHECK-NEXT: vpshufb %xmm1, %xmm0, %xmm0 14; CHECK-NEXT: retq 15 %shuffle = shufflevector <16 x i8> %a0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 16 %shift = call <16 x i8> @llvm.x86.xop.vpshab(<16 x i8> %shuffle, <16 x i8> %a1) 17 %res = shufflevector <16 x i8> %shift, <16 x i8> undef, <16 x i32> zeroinitializer 18 ret <16 x i8> %res 19} 20 21define <4 x i32> @demandedelts_vpshld(<4 x i32> %a0, <4 x i32> %a1) { 22; CHECK-LABEL: demandedelts_vpshld: 23; CHECK: # %bb.0: 24; CHECK-NEXT: vpshld %xmm1, %xmm0, %xmm0 25; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] 26; CHECK-NEXT: retq 27 %shuffle = shufflevector <4 x i32> %a1, <4 x i32> undef, <4 x i32> zeroinitializer 28 %shift = call <4 x i32> @llvm.x86.xop.vpshld(<4 x i32> %a0, <4 x i32> %shuffle) 29 %result = shufflevector <4 x i32> %shift, <4 x i32> undef, <4 x i32> zeroinitializer 30 ret <4 x i32> %result 31} 32 33; 34; isBinOp Handling 35; 36 37define <8 x i16> @binop_shuffle_vpshaw(<8 x i16> %a0, <8 x i16> %a1) { 38; CHECK-LABEL: binop_shuffle_vpshaw: 39; CHECK: # %bb.0: 40; CHECK-NEXT: vpshlw %xmm1, %xmm0, %xmm0 41; CHECK-NEXT: retq 42 %shuffle0 = shufflevector <8 x i16> %a0, <8 x i16> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7> 43 %shuffle1 = shufflevector <8 x i16> %a1, <8 x i16> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7> 44 %shift = call <8 x i16> @llvm.x86.xop.vpshlw(<8 x i16> %shuffle0, <8 x i16> %shuffle1) 45 %result = shufflevector <8 x i16> %shift, <8 x i16> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7> 46 ret <8 x i16> %result 47} 48 49; TODO - canonicalizeShuffleWithBinOps - handle scaled shuffle masks. 50define <2 x i64> @binop_shuffle_vpshlq(<2 x i64> %a0, <2 x i64> %a1) { 51; CHECK-LABEL: binop_shuffle_vpshlq: 52; CHECK: # %bb.0: 53; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 54; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 55; CHECK-NEXT: vpshlq %xmm1, %xmm0, %xmm0 56; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 57; CHECK-NEXT: retq 58 %shuffle0 = shufflevector <2 x i64> %a0, <2 x i64> undef, <2 x i32> <i32 1, i32 0> 59 %shuffle1 = shufflevector <2 x i64> %a1, <2 x i64> undef, <2 x i32> <i32 0, i32 0> 60 %shift = call <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64> %shuffle0, <2 x i64> %shuffle1) 61 %result = shufflevector <2 x i64> %shift, <2 x i64> undef, <2 x i32> <i32 1, i32 0> 62 ret <2 x i64> %result 63} 64 65declare <16 x i8> @llvm.x86.xop.vpshab(<16 x i8>, <16 x i8>) nounwind readnone 66declare <4 x i32> @llvm.x86.xop.vpshad(<4 x i32>, <4 x i32>) nounwind readnone 67declare <2 x i64> @llvm.x86.xop.vpshaq(<2 x i64>, <2 x i64>) nounwind readnone 68declare <8 x i16> @llvm.x86.xop.vpshaw(<8 x i16>, <8 x i16>) nounwind readnone 69 70declare <16 x i8> @llvm.x86.xop.vpshlb(<16 x i8>, <16 x i8>) nounwind readnone 71declare <4 x i32> @llvm.x86.xop.vpshld(<4 x i32>, <4 x i32>) nounwind readnone 72declare <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64>, <2 x i64>) nounwind readnone 73declare <8 x i16> @llvm.x86.xop.vpshlw(<8 x i16>, <8 x i16>) nounwind readnone 74