xref: /llvm-project/llvm/test/CodeGen/X86/x86-64-bittest-logic.ll (revision ed50e6060b1c51ec4a5dad6c01a64a5f1526cdb5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
3
4define i64 @and1(i64 %x) {
5; CHECK-LABEL: and1:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
8; CHECK-NEXT:    andq %rdi, %rax
9; CHECK-NEXT:    retq
10  %a = and i64 %x, 18446744071562067967 ; clear bit 31
11  ret i64 %a
12}
13
14define i64 @and2(i64 %x) {
15; CHECK-LABEL: and2:
16; CHECK:       # %bb.0:
17; CHECK-NEXT:    movabsq $-4294967297, %rax # imm = 0xFFFFFFFEFFFFFFFF
18; CHECK-NEXT:    andq %rdi, %rax
19; CHECK-NEXT:    retq
20  %a = and i64 %x, 18446744069414584319 ; clear bit 32
21  ret i64 %a
22}
23
24define i64 @and3(i64 %x) {
25; CHECK-LABEL: and3:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    movabsq $-4611686018427387905, %rax # imm = 0xBFFFFFFFFFFFFFFF
28; CHECK-NEXT:    andq %rdi, %rax
29; CHECK-NEXT:    retq
30  %a = and i64 %x, 13835058055282163711 ; clear bit 62
31  ret i64 %a
32}
33
34define i64 @and4(i64 %x) {
35; CHECK-LABEL: and4:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
38; CHECK-NEXT:    andq %rdi, %rax
39; CHECK-NEXT:    retq
40  %a = and i64 %x, 9223372036854775807 ; clear bit 63
41  ret i64 %a
42}
43
44define i64 @or1(i64 %x) {
45; CHECK-LABEL: or1:
46; CHECK:       # %bb.0:
47; CHECK-NEXT:    movl $2147483648, %eax # imm = 0x80000000
48; CHECK-NEXT:    orq %rdi, %rax
49; CHECK-NEXT:    retq
50  %a = or i64 %x, 2147483648 ; set bit 31
51  ret i64 %a
52}
53
54define i64 @or2(i64 %x) {
55; CHECK-LABEL: or2:
56; CHECK:       # %bb.0:
57; CHECK-NEXT:    movabsq $4294967296, %rax # imm = 0x100000000
58; CHECK-NEXT:    orq %rdi, %rax
59; CHECK-NEXT:    retq
60  %a = or i64 %x, 4294967296 ; set bit 32
61  ret i64 %a
62}
63
64define i64 @or3(i64 %x) {
65; CHECK-LABEL: or3:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
68; CHECK-NEXT:    orq %rdi, %rax
69; CHECK-NEXT:    retq
70  %a = or i64 %x, 4611686018427387904 ; set bit 62
71  ret i64 %a
72}
73
74define i64 @or4(i64 %x) {
75; CHECK-LABEL: or4:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
78; CHECK-NEXT:    orq %rdi, %rax
79; CHECK-NEXT:    retq
80  %a = or i64 %x, 9223372036854775808 ; set bit 63
81  ret i64 %a
82}
83
84define i64 @xor1(i64 %x) {
85; CHECK-LABEL: xor1:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    movl $2147483648, %eax # imm = 0x80000000
88; CHECK-NEXT:    xorq %rdi, %rax
89; CHECK-NEXT:    retq
90  %a = xor i64 %x, 2147483648 ; toggle bit 31
91  ret i64 %a
92}
93
94define i64 @xor2(i64 %x) {
95; CHECK-LABEL: xor2:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    movabsq $4294967296, %rax # imm = 0x100000000
98; CHECK-NEXT:    xorq %rdi, %rax
99; CHECK-NEXT:    retq
100  %a = xor i64 %x, 4294967296 ; toggle bit 32
101  ret i64 %a
102}
103
104define i64 @xor3(i64 %x) {
105; CHECK-LABEL: xor3:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
108; CHECK-NEXT:    xorq %rdi, %rax
109; CHECK-NEXT:    retq
110  %a = xor i64 %x, 4611686018427387904 ; toggle bit 62
111  ret i64 %a
112}
113
114define i64 @xor4(i64 %x) {
115; CHECK-LABEL: xor4:
116; CHECK:       # %bb.0:
117; CHECK-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
118; CHECK-NEXT:    xorq %rdi, %rax
119; CHECK-NEXT:    retq
120  %a = xor i64 %x, 9223372036854775808 ; toggle bit 63
121  ret i64 %a
122}
123
124define i64 @and1_optsize(i64 %x) optsize {
125; CHECK-LABEL: and1_optsize:
126; CHECK:       # %bb.0:
127; CHECK-NEXT:    movq %rdi, %rax
128; CHECK-NEXT:    btrq $31, %rax
129; CHECK-NEXT:    retq
130  %a = and i64 %x, 18446744071562067967 ; clear bit 31
131  ret i64 %a
132}
133
134define i64 @and2_optsize(i64 %x) optsize {
135; CHECK-LABEL: and2_optsize:
136; CHECK:       # %bb.0:
137; CHECK-NEXT:    movq %rdi, %rax
138; CHECK-NEXT:    btrq $32, %rax
139; CHECK-NEXT:    retq
140  %a = and i64 %x, 18446744069414584319 ; clear bit 32
141  ret i64 %a
142}
143
144define i64 @and3_optsize(i64 %x) optsize {
145; CHECK-LABEL: and3_optsize:
146; CHECK:       # %bb.0:
147; CHECK-NEXT:    movq %rdi, %rax
148; CHECK-NEXT:    btrq $62, %rax
149; CHECK-NEXT:    retq
150  %a = and i64 %x, 13835058055282163711 ; clear bit 62
151  ret i64 %a
152}
153
154define i64 @and4_optsize(i64 %x) optsize {
155; CHECK-LABEL: and4_optsize:
156; CHECK:       # %bb.0:
157; CHECK-NEXT:    movq %rdi, %rax
158; CHECK-NEXT:    btrq $63, %rax
159; CHECK-NEXT:    retq
160  %a = and i64 %x, 9223372036854775807 ; clear bit 63
161  ret i64 %a
162}
163
164define i64 @or1_optsize(i64 %x) optsize {
165; CHECK-LABEL: or1_optsize:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    movq %rdi, %rax
168; CHECK-NEXT:    btsq $31, %rax
169; CHECK-NEXT:    retq
170  %a = or i64 %x, 2147483648 ; set bit 31
171  ret i64 %a
172}
173
174define i64 @or2_optsize(i64 %x) optsize {
175; CHECK-LABEL: or2_optsize:
176; CHECK:       # %bb.0:
177; CHECK-NEXT:    movq %rdi, %rax
178; CHECK-NEXT:    btsq $32, %rax
179; CHECK-NEXT:    retq
180  %a = or i64 %x, 4294967296 ; set bit 32
181  ret i64 %a
182}
183
184define i64 @or3_optsize(i64 %x) optsize {
185; CHECK-LABEL: or3_optsize:
186; CHECK:       # %bb.0:
187; CHECK-NEXT:    movq %rdi, %rax
188; CHECK-NEXT:    btsq $62, %rax
189; CHECK-NEXT:    retq
190  %a = or i64 %x, 4611686018427387904 ; set bit 62
191  ret i64 %a
192}
193
194define i64 @or4_optsize(i64 %x) optsize {
195; CHECK-LABEL: or4_optsize:
196; CHECK:       # %bb.0:
197; CHECK-NEXT:    movq %rdi, %rax
198; CHECK-NEXT:    btsq $63, %rax
199; CHECK-NEXT:    retq
200  %a = or i64 %x, 9223372036854775808 ; set bit 63
201  ret i64 %a
202}
203
204define i64 @xor1_optsize(i64 %x) optsize {
205; CHECK-LABEL: xor1_optsize:
206; CHECK:       # %bb.0:
207; CHECK-NEXT:    movq %rdi, %rax
208; CHECK-NEXT:    btcq $31, %rax
209; CHECK-NEXT:    retq
210  %a = xor i64 %x, 2147483648 ; toggle bit 31
211  ret i64 %a
212}
213
214define i64 @xor2_optsize(i64 %x) optsize {
215; CHECK-LABEL: xor2_optsize:
216; CHECK:       # %bb.0:
217; CHECK-NEXT:    movq %rdi, %rax
218; CHECK-NEXT:    btcq $32, %rax
219; CHECK-NEXT:    retq
220  %a = xor i64 %x, 4294967296 ; toggle bit 32
221  ret i64 %a
222}
223
224define i64 @xor3_optsize(i64 %x) optsize {
225; CHECK-LABEL: xor3_optsize:
226; CHECK:       # %bb.0:
227; CHECK-NEXT:    movq %rdi, %rax
228; CHECK-NEXT:    btcq $62, %rax
229; CHECK-NEXT:    retq
230  %a = xor i64 %x, 4611686018427387904 ; toggle bit 62
231  ret i64 %a
232}
233
234define i64 @xor4_optsize(i64 %x) optsize {
235; CHECK-LABEL: xor4_optsize:
236; CHECK:       # %bb.0:
237; CHECK-NEXT:    movq %rdi, %rax
238; CHECK-NEXT:    btcq $63, %rax
239; CHECK-NEXT:    retq
240  %a = xor i64 %x, 9223372036854775808 ; toggle bit 63
241  ret i64 %a
242}
243
244define i64 @and1_pgso(i64 %x) !prof !14 {
245; CHECK-LABEL: and1_pgso:
246; CHECK:       # %bb.0:
247; CHECK-NEXT:    movq %rdi, %rax
248; CHECK-NEXT:    btrq $31, %rax
249; CHECK-NEXT:    retq
250  %a = and i64 %x, 18446744071562067967 ; clear bit 31
251  ret i64 %a
252}
253
254define i64 @and2_pgso(i64 %x) !prof !14 {
255; CHECK-LABEL: and2_pgso:
256; CHECK:       # %bb.0:
257; CHECK-NEXT:    movq %rdi, %rax
258; CHECK-NEXT:    btrq $32, %rax
259; CHECK-NEXT:    retq
260  %a = and i64 %x, 18446744069414584319 ; clear bit 32
261  ret i64 %a
262}
263
264define i64 @and3_pgso(i64 %x) !prof !14 {
265; CHECK-LABEL: and3_pgso:
266; CHECK:       # %bb.0:
267; CHECK-NEXT:    movq %rdi, %rax
268; CHECK-NEXT:    btrq $62, %rax
269; CHECK-NEXT:    retq
270  %a = and i64 %x, 13835058055282163711 ; clear bit 62
271  ret i64 %a
272}
273
274define i64 @and4_pgso(i64 %x) !prof !14 {
275; CHECK-LABEL: and4_pgso:
276; CHECK:       # %bb.0:
277; CHECK-NEXT:    movq %rdi, %rax
278; CHECK-NEXT:    btrq $63, %rax
279; CHECK-NEXT:    retq
280  %a = and i64 %x, 9223372036854775807 ; clear bit 63
281  ret i64 %a
282}
283
284define i64 @or1_pgso(i64 %x) !prof !14 {
285; CHECK-LABEL: or1_pgso:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    movq %rdi, %rax
288; CHECK-NEXT:    btsq $31, %rax
289; CHECK-NEXT:    retq
290  %a = or i64 %x, 2147483648 ; set bit 31
291  ret i64 %a
292}
293
294define i64 @or2_pgso(i64 %x) !prof !14 {
295; CHECK-LABEL: or2_pgso:
296; CHECK:       # %bb.0:
297; CHECK-NEXT:    movq %rdi, %rax
298; CHECK-NEXT:    btsq $32, %rax
299; CHECK-NEXT:    retq
300  %a = or i64 %x, 4294967296 ; set bit 32
301  ret i64 %a
302}
303
304define i64 @or3_pgso(i64 %x) !prof !14 {
305; CHECK-LABEL: or3_pgso:
306; CHECK:       # %bb.0:
307; CHECK-NEXT:    movq %rdi, %rax
308; CHECK-NEXT:    btsq $62, %rax
309; CHECK-NEXT:    retq
310  %a = or i64 %x, 4611686018427387904 ; set bit 62
311  ret i64 %a
312}
313
314define i64 @or4_pgso(i64 %x) !prof !14 {
315; CHECK-LABEL: or4_pgso:
316; CHECK:       # %bb.0:
317; CHECK-NEXT:    movq %rdi, %rax
318; CHECK-NEXT:    btsq $63, %rax
319; CHECK-NEXT:    retq
320  %a = or i64 %x, 9223372036854775808 ; set bit 63
321  ret i64 %a
322}
323
324define i64 @xor1_pgso(i64 %x) !prof !14 {
325; CHECK-LABEL: xor1_pgso:
326; CHECK:       # %bb.0:
327; CHECK-NEXT:    movq %rdi, %rax
328; CHECK-NEXT:    btcq $31, %rax
329; CHECK-NEXT:    retq
330  %a = xor i64 %x, 2147483648 ; toggle bit 31
331  ret i64 %a
332}
333
334define i64 @xor2_pgso(i64 %x) !prof !14 {
335; CHECK-LABEL: xor2_pgso:
336; CHECK:       # %bb.0:
337; CHECK-NEXT:    movq %rdi, %rax
338; CHECK-NEXT:    btcq $32, %rax
339; CHECK-NEXT:    retq
340  %a = xor i64 %x, 4294967296 ; toggle bit 32
341  ret i64 %a
342}
343
344define i64 @xor3_pgso(i64 %x) !prof !14 {
345; CHECK-LABEL: xor3_pgso:
346; CHECK:       # %bb.0:
347; CHECK-NEXT:    movq %rdi, %rax
348; CHECK-NEXT:    btcq $62, %rax
349; CHECK-NEXT:    retq
350  %a = xor i64 %x, 4611686018427387904 ; toggle bit 62
351  ret i64 %a
352}
353
354define i64 @xor4_pgso(i64 %x) !prof !14 {
355; CHECK-LABEL: xor4_pgso:
356; CHECK:       # %bb.0:
357; CHECK-NEXT:    movq %rdi, %rax
358; CHECK-NEXT:    btcq $63, %rax
359; CHECK-NEXT:    retq
360  %a = xor i64 %x, 9223372036854775808 ; toggle bit 63
361  ret i64 %a
362}
363
364!llvm.module.flags = !{!0}
365!0 = !{i32 1, !"ProfileSummary", !1}
366!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
367!2 = !{!"ProfileFormat", !"InstrProf"}
368!3 = !{!"TotalCount", i64 10000}
369!4 = !{!"MaxCount", i64 10}
370!5 = !{!"MaxInternalCount", i64 1}
371!6 = !{!"MaxFunctionCount", i64 1000}
372!7 = !{!"NumCounts", i64 3}
373!8 = !{!"NumFunctions", i64 3}
374!9 = !{!"DetailedSummary", !10}
375!10 = !{!11, !12, !13}
376!11 = !{i32 10000, i64 100, i32 1}
377!12 = !{i32 999000, i64 100, i32 1}
378!13 = !{i32 999999, i64 1, i32 2}
379!14 = !{!"function_entry_count", i64 0}
380