xref: /llvm-project/llvm/test/CodeGen/X86/virtreg-physreg-def-regallocfast.mir (revision 1bc8b3258e6d42f702fb11eb60d84d0e23935e3e) 
1# RUN: llc -o - -mtriple=x86_64-- -run-pass=regallocfast %s | FileCheck %s
2# RUN: llc -o - -mtriple=x86_64-- -passes=regallocfast %s | FileCheck %s
3# Fast regalloc used to not collect physical register definitions
4# before walking and assigning the virtual definition.
5# Therefore it was possible for a virtual definition to end up
6# using the same register as a later (in terms of operand list) physical
7# register.
8# Check this does not happen.
9#
10# PR41790
11---
12name: instruction_with_1virtreg_1physreg_defs
13tracksRegLiveness: true
14body: |
15  bb.0:
16    ; CHECK-NOT: $rax = KILL implicit-def dead $rax
17    %0:gr64 = KILL implicit-def dead $rax
18    KILL killed %0
19    RET 0
20...
21