xref: /llvm-project/llvm/test/CodeGen/X86/vec_set-F.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s
3
4define <2 x i64> @t1(ptr %ptr) nounwind  {
5; CHECK-LABEL: t1:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
8; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
9; CHECK-NEXT:    retl
10  %tmp615 = load <2 x i32>, ptr %ptr
11  %tmp7 = bitcast <2 x i32> %tmp615 to i64
12  %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %tmp7, i32 0
13  ret <2 x i64> %tmp8
14}
15
16define <2 x i64> @t2(i64 %x) nounwind  {
17; CHECK-LABEL: t2:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
20; CHECK-NEXT:    retl
21  %tmp717 = bitcast i64 %x to double
22  %tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0
23  %tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1
24  %tmp11 = bitcast <2 x double> %tmp9 to <2 x i64>
25  ret <2 x i64> %tmp11
26}
27