xref: /llvm-project/llvm/test/CodeGen/X86/vec_set-7.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
4
5define <2 x i64> @test(ptr %p) nounwind {
6; X86-LABEL: test:
7; X86:       # %bb.0:
8; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
9; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
10; X86-NEXT:    retl
11;
12; X64-LABEL: test:
13; X64:       # %bb.0:
14; X64-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
15; X64-NEXT:    retq
16  %tmp.upgrd.1 = load double, ptr %p
17  %tmp.upgrd.2 = insertelement <2 x double> undef, double %tmp.upgrd.1, i32 0
18  %tmp5 = insertelement <2 x double> %tmp.upgrd.2, double 0.0, i32 1
19  %tmp.upgrd.3 = bitcast <2 x double> %tmp5 to <2 x i64>
20  ret <2 x i64> %tmp.upgrd.3
21}
22
23