xref: /llvm-project/llvm/test/CodeGen/X86/vec-trunc-store.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
3
4define void @foo(ptr %p) nounwind {
5; CHECK-LABEL: foo:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movdqa (%rdi), %xmm0
8; CHECK-NEXT:    movdqa 16(%rdi), %xmm1
9; CHECK-NEXT:    pslld $16, %xmm1
10; CHECK-NEXT:    psrad $16, %xmm1
11; CHECK-NEXT:    pslld $16, %xmm0
12; CHECK-NEXT:    psrad $16, %xmm0
13; CHECK-NEXT:    packssdw %xmm1, %xmm0
14; CHECK-NEXT:    movdqa %xmm0, (%rax)
15; CHECK-NEXT:    retq
16  %t = load <8 x i32>, ptr %p
17  %cti69 = trunc <8 x i32> %t to <8 x i16>     ; <<8 x i16>> [#uses=1]
18  store <8 x i16> %cti69, ptr undef
19  ret void
20}
21
22define void @bar(ptr %p) nounwind {
23; CHECK-LABEL: bar:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
26; CHECK-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
27; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
28; CHECK-NEXT:    movq %xmm0, (%rax)
29; CHECK-NEXT:    retq
30  %t = load <4 x i32>, ptr %p
31  %cti44 = trunc <4 x i32> %t to <4 x i16>     ; <<4 x i16>> [#uses=1]
32  store <4 x i16> %cti44, ptr undef
33  ret void
34}
35