1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK 4 5 6declare <8 x i64> @llvm.experimental.constrained.fptosi.v8i64.v8f16(<8 x half>, metadata) 7declare <8 x i64> @llvm.experimental.constrained.fptoui.v8i64.v8f16(<8 x half>, metadata) 8declare <16 x i32> @llvm.experimental.constrained.fptosi.v16i32.v16f16(<16 x half>, metadata) 9declare <16 x i32> @llvm.experimental.constrained.fptoui.v16i32.v16f16(<16 x half>, metadata) 10declare <32 x i16> @llvm.experimental.constrained.fptosi.v32i16.v32f16(<32 x half>, metadata) 11declare <32 x i16> @llvm.experimental.constrained.fptoui.v32i16.v32f16(<32 x half>, metadata) 12declare <32 x i8> @llvm.experimental.constrained.fptosi.v32i8.v32f16(<32 x half>, metadata) 13declare <32 x i8> @llvm.experimental.constrained.fptoui.v32i8.v32f16(<32 x half>, metadata) 14declare <32 x i1> @llvm.experimental.constrained.fptosi.v32i1.v32f16(<32 x half>, metadata) 15declare <32 x i1> @llvm.experimental.constrained.fptoui.v32i1.v32f16(<32 x half>, metadata) 16 17define <8 x i64> @strict_vector_fptosi_v8f16_to_v8i64(<8 x half> %a) #0 { 18; CHECK-LABEL: strict_vector_fptosi_v8f16_to_v8i64: 19; CHECK: # %bb.0: 20; CHECK-NEXT: vcvttph2qq %xmm0, %zmm0 21; CHECK-NEXT: ret{{[l|q]}} 22 %ret = call <8 x i64> @llvm.experimental.constrained.fptosi.v8i64.v8f16(<8 x half> %a, 23 metadata !"fpexcept.strict") #0 24 ret <8 x i64> %ret 25} 26 27define <8 x i64> @strict_vector_fptoui_v8f16_to_v8i64(<8 x half> %a) #0 { 28; CHECK-LABEL: strict_vector_fptoui_v8f16_to_v8i64: 29; CHECK: # %bb.0: 30; CHECK-NEXT: vcvttph2uqq %xmm0, %zmm0 31; CHECK-NEXT: ret{{[l|q]}} 32 %ret = call <8 x i64> @llvm.experimental.constrained.fptoui.v8i64.v8f16(<8 x half> %a, 33 metadata !"fpexcept.strict") #0 34 ret <8 x i64> %ret 35} 36 37define <16 x i32> @strict_vector_fptosi_v16f16_to_v16i32(<16 x half> %a) #0 { 38; CHECK-LABEL: strict_vector_fptosi_v16f16_to_v16i32: 39; CHECK: # %bb.0: 40; CHECK-NEXT: vcvttph2dq %ymm0, %zmm0 41; CHECK-NEXT: ret{{[l|q]}} 42 %ret = call <16 x i32> @llvm.experimental.constrained.fptosi.v16i32.v16f16(<16 x half> %a, 43 metadata !"fpexcept.strict") #0 44 ret <16 x i32> %ret 45} 46 47define <16 x i32> @strict_vector_fptoui_v16f16_to_v16i32(<16 x half> %a) #0 { 48; CHECK-LABEL: strict_vector_fptoui_v16f16_to_v16i32: 49; CHECK: # %bb.0: 50; CHECK-NEXT: vcvttph2udq %ymm0, %zmm0 51; CHECK-NEXT: ret{{[l|q]}} 52 %ret = call <16 x i32> @llvm.experimental.constrained.fptoui.v16i32.v16f16(<16 x half> %a, 53 metadata !"fpexcept.strict") #0 54 ret <16 x i32> %ret 55} 56 57define <32 x i16> @strict_vector_fptosi_v32f16_to_v32i16(<32 x half> %a) #0 { 58; CHECK-LABEL: strict_vector_fptosi_v32f16_to_v32i16: 59; CHECK: # %bb.0: 60; CHECK-NEXT: vcvttph2w %zmm0, %zmm0 61; CHECK-NEXT: ret{{[l|q]}} 62 %ret = call <32 x i16> @llvm.experimental.constrained.fptosi.v32i16.v32f16(<32 x half> %a, 63 metadata !"fpexcept.strict") #0 64 ret <32 x i16> %ret 65} 66 67define <32 x i16> @strict_vector_fptoui_v32f16_to_v32i16(<32 x half> %a) #0 { 68; CHECK-LABEL: strict_vector_fptoui_v32f16_to_v32i16: 69; CHECK: # %bb.0: 70; CHECK-NEXT: vcvttph2uw %zmm0, %zmm0 71; CHECK-NEXT: ret{{[l|q]}} 72 %ret = call <32 x i16> @llvm.experimental.constrained.fptoui.v32i16.v32f16(<32 x half> %a, 73 metadata !"fpexcept.strict") #0 74 ret <32 x i16> %ret 75} 76 77define <32 x i8> @strict_vector_fptosi_v32f16_to_v32i8(<32 x half> %a) #0 { 78; CHECK-LABEL: strict_vector_fptosi_v32f16_to_v32i8: 79; CHECK: # %bb.0: 80; CHECK-NEXT: vcvttph2w %zmm0, %zmm0 81; CHECK-NEXT: vpmovwb %zmm0, %ymm0 82; CHECK-NEXT: ret{{[l|q]}} 83 %ret = call <32 x i8> @llvm.experimental.constrained.fptosi.v32i8.v32f16(<32 x half> %a, 84 metadata !"fpexcept.strict") #0 85 ret <32 x i8> %ret 86} 87 88define <32 x i8> @strict_vector_fptoui_v32f16_to_v32i8(<32 x half> %a) #0 { 89; CHECK-LABEL: strict_vector_fptoui_v32f16_to_v32i8: 90; CHECK: # %bb.0: 91; CHECK-NEXT: vcvttph2w %zmm0, %zmm0 92; CHECK-NEXT: vpmovwb %zmm0, %ymm0 93; CHECK-NEXT: ret{{[l|q]}} 94 %ret = call <32 x i8> @llvm.experimental.constrained.fptoui.v32i8.v32f16(<32 x half> %a, 95 metadata !"fpexcept.strict") #0 96 ret <32 x i8> %ret 97} 98 99define <32 x i1> @strict_vector_fptosi_v32f16_to_v32i1(<32 x half> %a) #0 { 100; CHECK-LABEL: strict_vector_fptosi_v32f16_to_v32i1: 101; CHECK: # %bb.0: 102; CHECK-NEXT: vcvttph2w %zmm0, %zmm0 103; CHECK-NEXT: vpmovw2m %zmm0, %k0 104; CHECK-NEXT: vpmovm2b %k0, %ymm0 105; CHECK-NEXT: ret{{[l|q]}} 106 %ret = call <32 x i1> @llvm.experimental.constrained.fptosi.v32i1.v32f16(<32 x half> %a, 107 metadata !"fpexcept.strict") #0 108 ret <32 x i1> %ret 109} 110 111define <32 x i1> @strict_vector_fptoui_v32f16_to_v32i1(<32 x half> %a) #0 { 112; CHECK-LABEL: strict_vector_fptoui_v32f16_to_v32i1: 113; CHECK: # %bb.0: 114; CHECK-NEXT: vcvttph2w %zmm0, %zmm0 115; CHECK-NEXT: vpsllw $15, %zmm0, %zmm0 116; CHECK-NEXT: vpmovw2m %zmm0, %k0 117; CHECK-NEXT: vpmovm2b %k0, %ymm0 118; CHECK-NEXT: ret{{[l|q]}} 119 %ret = call <32 x i1> @llvm.experimental.constrained.fptoui.v32i1.v32f16(<32 x half> %a, 120 metadata !"fpexcept.strict") #0 121 ret <32 x i1> %ret 122} 123 124attributes #0 = { strictfp } 125