1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s 3; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s 4 5define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind { 6; CHECK-LABEL: v4f32: 7; CHECK: ## %bb.0: 8; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm0 9; CHECK-NEXT: retq 10 %tmp = tail call <4 x float> @llvm.copysign.v4f32( <4 x float> %a, <4 x float> %b ) 11 ret <4 x float> %tmp 12} 13 14define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind { 15; CHECK-LABEL: v8f32: 16; CHECK: ## %bb.0: 17; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm0 18; CHECK-NEXT: retq 19 %tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b ) 20 ret <8 x float> %tmp 21} 22 23define <16 x float> @v16f32(<16 x float> %a, <16 x float> %b) nounwind { 24; CHECK-LABEL: v16f32: 25; CHECK: ## %bb.0: 26; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm1, %zmm0 27; CHECK-NEXT: retq 28 %tmp = tail call <16 x float> @llvm.copysign.v16f32( <16 x float> %a, <16 x float> %b ) 29 ret <16 x float> %tmp 30} 31 32define <2 x double> @v2f64(<2 x double> %a, <2 x double> %b) nounwind { 33; CHECK-LABEL: v2f64: 34; CHECK: ## %bb.0: 35; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0 36; CHECK-NEXT: retq 37 %tmp = tail call <2 x double> @llvm.copysign.v2f64( <2 x double> %a, <2 x double> %b ) 38 ret <2 x double> %tmp 39} 40 41define <4 x double> @v4f64(<4 x double> %a, <4 x double> %b) nounwind { 42; CHECK-LABEL: v4f64: 43; CHECK: ## %bb.0: 44; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm0 45; CHECK-NEXT: retq 46 %tmp = tail call <4 x double> @llvm.copysign.v4f64( <4 x double> %a, <4 x double> %b ) 47 ret <4 x double> %tmp 48} 49 50define <8 x double> @v8f64(<8 x double> %a, <8 x double> %b) nounwind { 51; CHECK-LABEL: v8f64: 52; CHECK: ## %bb.0: 53; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm1, %zmm0 54; CHECK-NEXT: retq 55 %tmp = tail call <8 x double> @llvm.copysign.v8f64( <8 x double> %a, <8 x double> %b ) 56 ret <8 x double> %tmp 57} 58 59declare <4 x float> @llvm.copysign.v4f32(<4 x float> %Mag, <4 x float> %Sgn) 60declare <8 x float> @llvm.copysign.v8f32(<8 x float> %Mag, <8 x float> %Sgn) 61declare <16 x float> @llvm.copysign.v16f32(<16 x float> %Mag, <16 x float> %Sgn) 62declare <2 x double> @llvm.copysign.v2f64(<2 x double> %Mag, <2 x double> %Sgn) 63declare <4 x double> @llvm.copysign.v4f64(<4 x double> %Mag, <4 x double> %Sgn) 64declare <8 x double> @llvm.copysign.v8f64(<8 x double> %Mag, <8 x double> %Sgn) 65 66