xref: /llvm-project/llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll (revision 86eff6be686a1e41e13c08ebfc2db4dd4d58e7c6)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=X86
3
4define { i64, i8 } @mulodi_test(i64 %l, i64 %r) unnamed_addr #0 {
5; X86-LABEL: mulodi_test:
6; X86:       # %bb.0: # %start
7; X86-NEXT:    pushl %ebp
8; X86-NEXT:    .cfi_def_cfa_offset 8
9; X86-NEXT:    pushl %ebx
10; X86-NEXT:    .cfi_def_cfa_offset 12
11; X86-NEXT:    pushl %edi
12; X86-NEXT:    .cfi_def_cfa_offset 16
13; X86-NEXT:    pushl %esi
14; X86-NEXT:    .cfi_def_cfa_offset 20
15; X86-NEXT:    .cfi_offset %esi, -20
16; X86-NEXT:    .cfi_offset %edi, -16
17; X86-NEXT:    .cfi_offset %ebx, -12
18; X86-NEXT:    .cfi_offset %ebp, -8
19; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebp
20; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
21; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
22; X86-NEXT:    testl %esi, %esi
23; X86-NEXT:    setne %dl
24; X86-NEXT:    testl %eax, %eax
25; X86-NEXT:    setne %cl
26; X86-NEXT:    andb %dl, %cl
27; X86-NEXT:    mull {{[0-9]+}}(%esp)
28; X86-NEXT:    movl %eax, %edi
29; X86-NEXT:    seto %bl
30; X86-NEXT:    movl %esi, %eax
31; X86-NEXT:    mull %ebp
32; X86-NEXT:    seto %ch
33; X86-NEXT:    orb %bl, %ch
34; X86-NEXT:    orb %cl, %ch
35; X86-NEXT:    leal (%edi,%eax), %esi
36; X86-NEXT:    movl %ebp, %eax
37; X86-NEXT:    mull {{[0-9]+}}(%esp)
38; X86-NEXT:    addl %esi, %edx
39; X86-NEXT:    setb %cl
40; X86-NEXT:    orb %ch, %cl
41; X86-NEXT:    popl %esi
42; X86-NEXT:    .cfi_def_cfa_offset 16
43; X86-NEXT:    popl %edi
44; X86-NEXT:    .cfi_def_cfa_offset 12
45; X86-NEXT:    popl %ebx
46; X86-NEXT:    .cfi_def_cfa_offset 8
47; X86-NEXT:    popl %ebp
48; X86-NEXT:    .cfi_def_cfa_offset 4
49; X86-NEXT:    retl
50start:
51  %0 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %l, i64 %r) #2
52  %1 = extractvalue { i64, i1 } %0, 0
53  %2 = extractvalue { i64, i1 } %0, 1
54  %3 = zext i1 %2 to i8
55  %4 = insertvalue { i64, i8 } undef, i64 %1, 0
56  %5 = insertvalue { i64, i8 } %4, i8 %3, 1
57  ret { i64, i8 } %5
58}
59
60; Function Attrs: nounwind readnone speculatable
61declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
62
63attributes #0 = { nounwind readnone uwtable }
64attributes #1 = { nounwind readnone speculatable }
65attributes #2 = { nounwind }
66