1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512 6 7define <4 x i32> @test1(<8 x i32> %v) { 8; SSE2-LABEL: test1: 9; SSE2: # %bb.0: 10; SSE2-NEXT: retq 11; 12; AVX-LABEL: test1: 13; AVX: # %bb.0: 14; AVX-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 15; AVX-NEXT: vzeroupper 16; AVX-NEXT: retq 17 %x = sext <8 x i32> %v to <8 x i64> 18 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 19 %t = trunc <4 x i64> %s to <4 x i32> 20 ret <4 x i32> %t 21} 22 23define <4 x i32> @test2(<8 x i32> %v) { 24; SSE2-LABEL: test2: 25; SSE2: # %bb.0: 26; SSE2-NEXT: movaps %xmm1, %xmm0 27; SSE2-NEXT: retq 28; 29; AVX-LABEL: test2: 30; AVX: # %bb.0: 31; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 32; AVX-NEXT: vzeroupper 33; AVX-NEXT: retq 34 %x = sext <8 x i32> %v to <8 x i64> 35 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> 36 %t = trunc <4 x i64> %s to <4 x i32> 37 ret <4 x i32> %t 38} 39 40define <2 x i32> @test3(<8 x i32> %v) { 41; SSE2-LABEL: test3: 42; SSE2: # %bb.0: 43; SSE2-NEXT: movaps %xmm1, %xmm0 44; SSE2-NEXT: retq 45; 46; AVX-LABEL: test3: 47; AVX: # %bb.0: 48; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 49; AVX-NEXT: vzeroupper 50; AVX-NEXT: retq 51 %x = sext <8 x i32> %v to <8 x i64> 52 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 4, i32 5> 53 %t = trunc <2 x i64> %s to <2 x i32> 54 ret <2 x i32> %t 55} 56 57define <2 x i32> @test4(<8 x i32> %v) { 58; SSE2-LABEL: test4: 59; SSE2: # %bb.0: 60; SSE2-NEXT: retq 61; 62; AVX-LABEL: test4: 63; AVX: # %bb.0: 64; AVX-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 65; AVX-NEXT: vzeroupper 66; AVX-NEXT: retq 67 %x = sext <8 x i32> %v to <8 x i64> 68 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 0, i32 1> 69 %t = trunc <2 x i64> %s to <2 x i32> 70 ret <2 x i32> %t 71} 72 73define <2 x i32> @test5(<8 x i32> %v) { 74; SSE2-LABEL: test5: 75; SSE2: # %bb.0: 76; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3] 77; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 78; SSE2-NEXT: retq 79; 80; AVX2-LABEL: test5: 81; AVX2: # %bb.0: 82; AVX2-NEXT: vmovaps {{.*#+}} xmm1 = [3,4,4,4] 83; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 84; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 85; AVX2-NEXT: vzeroupper 86; AVX2-NEXT: retq 87; 88; AVX512-LABEL: test5: 89; AVX512: # %bb.0: 90; AVX512-NEXT: vpmovsxdq %ymm0, %zmm0 91; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 92; AVX512-NEXT: vpextrq $1, %xmm1, %rax 93; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm0 94; AVX512-NEXT: vmovq %xmm0, %rcx 95; AVX512-NEXT: vmovd %eax, %xmm0 96; AVX512-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 97; AVX512-NEXT: vzeroupper 98; AVX512-NEXT: retq 99 %x = sext <8 x i32> %v to <8 x i64> 100 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 3, i32 4> 101 %t = trunc <2 x i64> %s to <2 x i32> 102 ret <2 x i32> %t 103} 104 105define <4 x i32> @test6(<8 x i32> %v) { 106; SSE2-LABEL: test6: 107; SSE2: # %bb.0: 108; SSE2-NEXT: retq 109; 110; AVX-LABEL: test6: 111; AVX: # %bb.0: 112; AVX-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 113; AVX-NEXT: vzeroupper 114; AVX-NEXT: retq 115 %x = zext <8 x i32> %v to <8 x i64> 116 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 117 %t = trunc <4 x i64> %s to <4 x i32> 118 ret <4 x i32> %t 119} 120 121define <4 x i32> @test7(<8 x i32> %v) { 122; SSE2-LABEL: test7: 123; SSE2: # %bb.0: 124; SSE2-NEXT: movaps %xmm1, %xmm0 125; SSE2-NEXT: retq 126; 127; AVX-LABEL: test7: 128; AVX: # %bb.0: 129; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 130; AVX-NEXT: vzeroupper 131; AVX-NEXT: retq 132 %x = zext <8 x i32> %v to <8 x i64> 133 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> 134 %t = trunc <4 x i64> %s to <4 x i32> 135 ret <4 x i32> %t 136} 137 138define <2 x i32> @test8(<8 x i32> %v) { 139; SSE2-LABEL: test8: 140; SSE2: # %bb.0: 141; SSE2-NEXT: movaps %xmm1, %xmm0 142; SSE2-NEXT: retq 143; 144; AVX-LABEL: test8: 145; AVX: # %bb.0: 146; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 147; AVX-NEXT: vzeroupper 148; AVX-NEXT: retq 149 %x = zext <8 x i32> %v to <8 x i64> 150 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 4, i32 5> 151 %t = trunc <2 x i64> %s to <2 x i32> 152 ret <2 x i32> %t 153} 154 155define <2 x i32> @test9(<8 x i32> %v) { 156; SSE2-LABEL: test9: 157; SSE2: # %bb.0: 158; SSE2-NEXT: retq 159; 160; AVX-LABEL: test9: 161; AVX: # %bb.0: 162; AVX-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 163; AVX-NEXT: vzeroupper 164; AVX-NEXT: retq 165 %x = zext <8 x i32> %v to <8 x i64> 166 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 0, i32 1> 167 %t = trunc <2 x i64> %s to <2 x i32> 168 ret <2 x i32> %t 169} 170 171define <2 x i32> @test10(<8 x i32> %v) { 172; SSE2-LABEL: test10: 173; SSE2: # %bb.0: 174; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3] 175; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 176; SSE2-NEXT: retq 177; 178; AVX2-LABEL: test10: 179; AVX2: # %bb.0: 180; AVX2-NEXT: vmovaps {{.*#+}} xmm1 = [3,4,4,4] 181; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 182; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 183; AVX2-NEXT: vzeroupper 184; AVX2-NEXT: retq 185; 186; AVX512-LABEL: test10: 187; AVX512: # %bb.0: 188; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero 189; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 190; AVX512-NEXT: vpextrq $1, %xmm1, %rax 191; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm0 192; AVX512-NEXT: vmovq %xmm0, %rcx 193; AVX512-NEXT: vmovd %eax, %xmm0 194; AVX512-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 195; AVX512-NEXT: vzeroupper 196; AVX512-NEXT: retq 197 %x = zext <8 x i32> %v to <8 x i64> 198 %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 3, i32 4> 199 %t = trunc <2 x i64> %s to <2 x i32> 200 ret <2 x i32> %t 201} 202