1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-apple-darwin10.2 < %s | FileCheck %s -check-prefix=X64 3; RUN: llc -mtriple=i686-apple-darwin10.2 -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefixes=X86,X86-BWON 4; RUN: llc -mtriple=i686-apple-darwin10.2 -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefixes=X86,X86-BWOFF 5 6target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 7 8; rdar://7860110 9 10define void @test1(ptr nocapture %a0, i8 zeroext %a1) nounwind ssp { 11; X64-LABEL: test1: 12; X64: ## %bb.0: ## %entry 13; X64-NEXT: movb %sil, (%rdi) 14; X64-NEXT: retq 15; 16; X86-BWON-LABEL: test1: 17; X86-BWON: ## %bb.0: ## %entry 18; X86-BWON-NEXT: movzbl {{[0-9]+}}(%esp), %eax 19; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 20; X86-BWON-NEXT: movb %al, (%ecx) 21; X86-BWON-NEXT: retl 22; 23; X86-BWOFF-LABEL: test1: 24; X86-BWOFF: ## %bb.0: ## %entry 25; X86-BWOFF-NEXT: movb {{[0-9]+}}(%esp), %al 26; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 27; X86-BWOFF-NEXT: movb %al, (%ecx) 28; X86-BWOFF-NEXT: retl 29entry: 30 %A = load i32, ptr %a0, align 4 31 %B = and i32 %A, -256 ; 0xFFFFFF00 32 %C = zext i8 %a1 to i32 33 %D = or i32 %C, %B 34 store i32 %D, ptr %a0, align 4 35 ret void 36} 37 38define void @test2(ptr nocapture %a0, i8 zeroext %a1) nounwind ssp { 39; X64-LABEL: test2: 40; X64: ## %bb.0: ## %entry 41; X64-NEXT: movb %sil, 1(%rdi) 42; X64-NEXT: retq 43; 44; X86-BWON-LABEL: test2: 45; X86-BWON: ## %bb.0: ## %entry 46; X86-BWON-NEXT: movzbl {{[0-9]+}}(%esp), %eax 47; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 48; X86-BWON-NEXT: movb %al, 1(%ecx) 49; X86-BWON-NEXT: retl 50; 51; X86-BWOFF-LABEL: test2: 52; X86-BWOFF: ## %bb.0: ## %entry 53; X86-BWOFF-NEXT: movb {{[0-9]+}}(%esp), %al 54; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 55; X86-BWOFF-NEXT: movb %al, 1(%ecx) 56; X86-BWOFF-NEXT: retl 57entry: 58 %A = load i32, ptr %a0, align 4 59 %B = and i32 %A, -65281 ; 0xFFFF00FF 60 %C = zext i8 %a1 to i32 61 %CS = shl i32 %C, 8 62 %D = or i32 %B, %CS 63 store i32 %D, ptr %a0, align 4 64 ret void 65} 66 67define void @test3(ptr nocapture %a0, i16 zeroext %a1) nounwind ssp { 68; X64-LABEL: test3: 69; X64: ## %bb.0: ## %entry 70; X64-NEXT: movw %si, (%rdi) 71; X64-NEXT: retq 72; 73; X86-BWON-LABEL: test3: 74; X86-BWON: ## %bb.0: ## %entry 75; X86-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax 76; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 77; X86-BWON-NEXT: movw %ax, (%ecx) 78; X86-BWON-NEXT: retl 79; 80; X86-BWOFF-LABEL: test3: 81; X86-BWOFF: ## %bb.0: ## %entry 82; X86-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax 83; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 84; X86-BWOFF-NEXT: movw %ax, (%ecx) 85; X86-BWOFF-NEXT: retl 86entry: 87 %A = load i32, ptr %a0, align 4 88 %B = and i32 %A, -65536 ; 0xFFFF0000 89 %C = zext i16 %a1 to i32 90 %D = or i32 %B, %C 91 store i32 %D, ptr %a0, align 4 92 ret void 93} 94 95define void @test4(ptr nocapture %a0, i16 zeroext %a1) nounwind ssp { 96; X64-LABEL: test4: 97; X64: ## %bb.0: ## %entry 98; X64-NEXT: movw %si, 2(%rdi) 99; X64-NEXT: retq 100; 101; X86-BWON-LABEL: test4: 102; X86-BWON: ## %bb.0: ## %entry 103; X86-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax 104; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 105; X86-BWON-NEXT: movw %ax, 2(%ecx) 106; X86-BWON-NEXT: retl 107; 108; X86-BWOFF-LABEL: test4: 109; X86-BWOFF: ## %bb.0: ## %entry 110; X86-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax 111; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 112; X86-BWOFF-NEXT: movw %ax, 2(%ecx) 113; X86-BWOFF-NEXT: retl 114entry: 115 %A = load i32, ptr %a0, align 4 116 %B = and i32 %A, 65535 ; 0x0000FFFF 117 %C = zext i16 %a1 to i32 118 %CS = shl i32 %C, 16 119 %D = or i32 %B, %CS 120 store i32 %D, ptr %a0, align 4 121 ret void 122} 123 124define void @test5(ptr nocapture %a0, i16 zeroext %a1) nounwind ssp { 125; X64-LABEL: test5: 126; X64: ## %bb.0: ## %entry 127; X64-NEXT: movw %si, 2(%rdi) 128; X64-NEXT: retq 129; 130; X86-BWON-LABEL: test5: 131; X86-BWON: ## %bb.0: ## %entry 132; X86-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax 133; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 134; X86-BWON-NEXT: movw %ax, 2(%ecx) 135; X86-BWON-NEXT: retl 136; 137; X86-BWOFF-LABEL: test5: 138; X86-BWOFF: ## %bb.0: ## %entry 139; X86-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax 140; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 141; X86-BWOFF-NEXT: movw %ax, 2(%ecx) 142; X86-BWOFF-NEXT: retl 143entry: 144 %A = load i64, ptr %a0, align 4 145 %B = and i64 %A, -4294901761 ; 0xFFFFFFFF0000FFFF 146 %C = zext i16 %a1 to i64 147 %CS = shl i64 %C, 16 148 %D = or i64 %B, %CS 149 store i64 %D, ptr %a0, align 4 150 ret void 151} 152 153define void @test6(ptr nocapture %a0, i8 zeroext %a1) nounwind ssp { 154; X64-LABEL: test6: 155; X64: ## %bb.0: ## %entry 156; X64-NEXT: movb %sil, 5(%rdi) 157; X64-NEXT: retq 158; 159; X86-BWON-LABEL: test6: 160; X86-BWON: ## %bb.0: ## %entry 161; X86-BWON-NEXT: movzbl {{[0-9]+}}(%esp), %eax 162; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx 163; X86-BWON-NEXT: movb %al, 5(%ecx) 164; X86-BWON-NEXT: retl 165; 166; X86-BWOFF-LABEL: test6: 167; X86-BWOFF: ## %bb.0: ## %entry 168; X86-BWOFF-NEXT: movb {{[0-9]+}}(%esp), %al 169; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx 170; X86-BWOFF-NEXT: movb %al, 5(%ecx) 171; X86-BWOFF-NEXT: retl 172entry: 173 %A = load i64, ptr %a0, align 4 174 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 175 %C = zext i8 %a1 to i64 176 %CS = shl i64 %C, 40 177 %D = or i64 %B, %CS 178 store i64 %D, ptr %a0, align 4 179 ret void 180} 181 182define i32 @test7(ptr nocapture %a0, i8 zeroext %a1, ptr %P2) nounwind { 183; X64-LABEL: test7: 184; X64: ## %bb.0: ## %entry 185; X64-NEXT: movl (%rdx), %eax 186; X64-NEXT: movb %sil, 5(%rdi) 187; X64-NEXT: retq 188; 189; X86-BWON-LABEL: test7: 190; X86-BWON: ## %bb.0: ## %entry 191; X86-BWON-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 192; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx 193; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %eax 194; X86-BWON-NEXT: movl (%eax), %eax 195; X86-BWON-NEXT: movb %cl, 5(%edx) 196; X86-BWON-NEXT: retl 197; 198; X86-BWOFF-LABEL: test7: 199; X86-BWOFF: ## %bb.0: ## %entry 200; X86-BWOFF-NEXT: movb {{[0-9]+}}(%esp), %cl 201; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx 202; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %eax 203; X86-BWOFF-NEXT: movl (%eax), %eax 204; X86-BWOFF-NEXT: movb %cl, 5(%edx) 205; X86-BWOFF-NEXT: retl 206entry: 207 %OtherLoad = load i32 , ptr%P2 208 %A = load i64, ptr %a0, align 4 209 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 210 %C = zext i8 %a1 to i64 211 %CS = shl i64 %C, 40 212 %D = or i64 %B, %CS 213 store i64 %D, ptr %a0, align 4 214 ret i32 %OtherLoad 215} 216 217; PR7833 218 219@g_16 = internal global i32 -1 220 221define void @test8() nounwind { 222; X64-LABEL: test8: 223; X64: ## %bb.0: 224; X64-NEXT: orb $1, _g_16(%rip) 225; X64-NEXT: retq 226; 227; X86-LABEL: test8: 228; X86: ## %bb.0: 229; X86-NEXT: orb $1, _g_16 230; X86-NEXT: retl 231 %tmp = load i32, ptr @g_16 232 store i32 0, ptr @g_16 233 %or = or i32 %tmp, 1 234 store i32 %or, ptr @g_16 235 ret void 236} 237 238define void @test9() nounwind { 239; X64-LABEL: test9: 240; X64: ## %bb.0: 241; X64-NEXT: orb $1, _g_16(%rip) 242; X64-NEXT: retq 243; 244; X86-LABEL: test9: 245; X86: ## %bb.0: 246; X86-NEXT: orb $1, _g_16 247; X86-NEXT: retl 248 %tmp = load i32, ptr @g_16 249 %or = or i32 %tmp, 1 250 store i32 %or, ptr @g_16 251 ret void 252} 253 254; rdar://8494845 + PR8244 255define i8 @test10(ptr %P) nounwind ssp { 256; X64-LABEL: test10: 257; X64: ## %bb.0: ## %entry 258; X64-NEXT: movsbl (%rdi), %eax 259; X64-NEXT: shrl $8, %eax 260; X64-NEXT: ## kill: def $al killed $al killed $eax 261; X64-NEXT: retq 262; 263; X86-LABEL: test10: 264; X86: ## %bb.0: ## %entry 265; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 266; X86-NEXT: movsbl (%eax), %eax 267; X86-NEXT: movb %ah, %al 268; X86-NEXT: retl 269entry: 270 %tmp = load i8, ptr %P, align 1 271 %conv = sext i8 %tmp to i32 272 %shr3 = lshr i32 %conv, 8 273 %conv2 = trunc i32 %shr3 to i8 274 ret i8 %conv2 275} 276