1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass=greedy -o - %s | FileCheck %s 3 4--- | 5 ; ModuleID = 'folding.ll' 6 source_filename = "folding.ll" 7 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 8 target triple = "x86_64-pc-linux-gnu" 9 10 declare void @func() 11 12 define i32 @test_spill(ptr addrspace(1) %arg00, ptr addrspace(1) %arg01, ptr addrspace(1) %arg02, ptr addrspace(1) %arg03, ptr addrspace(1) %arg04, ptr addrspace(1) %arg05, ptr addrspace(1) %arg06, ptr addrspace(1) %arg07, ptr addrspace(1) %arg08) gc "statepoint-example" { 13 %token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) %arg00, ptr addrspace(1) %arg01, ptr addrspace(1) %arg02, ptr addrspace(1) %arg03, ptr addrspace(1) %arg04, ptr addrspace(1) %arg05, ptr addrspace(1) %arg06, ptr addrspace(1) %arg07, ptr addrspace(1) %arg08) ] 14 %rel00 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 0, i32 0) ; (%arg00, %arg00) 15 %rel01 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 1, i32 1) ; (%arg01, %arg01) 16 %rel02 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 2, i32 2) ; (%arg02, %arg02) 17 %rel03 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 3, i32 3) ; (%arg03, %arg03) 18 %rel04 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 4, i32 4) ; (%arg04, %arg04) 19 %rel05 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 5, i32 5) ; (%arg05, %arg05) 20 %rel06 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 6, i32 6) ; (%arg06, %arg06) 21 %rel07 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 7, i32 7) ; (%arg07, %arg07) 22 %rel08 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 8, i32 8) ; (%arg08, %arg08) 23 %gep00 = getelementptr i32, ptr addrspace(1) %rel00, i64 1 24 %gep01 = getelementptr i32, ptr addrspace(1) %rel01, i64 2 25 %gep02 = getelementptr i32, ptr addrspace(1) %rel02, i64 3 26 %gep03 = getelementptr i32, ptr addrspace(1) %rel03, i64 4 27 %gep04 = getelementptr i32, ptr addrspace(1) %rel04, i64 5 28 %gep05 = getelementptr i32, ptr addrspace(1) %rel05, i64 6 29 %gep06 = getelementptr i32, ptr addrspace(1) %rel06, i64 7 30 %gep07 = getelementptr i32, ptr addrspace(1) %rel07, i64 8 31 %gep08 = getelementptr i32, ptr addrspace(1) %rel08, i64 9 32 %val00 = load i32, ptr addrspace(1) %gep00, align 4 33 %val01 = load i32, ptr addrspace(1) %gep01, align 4 34 %sum01 = add i32 %val00, %val01 35 %val02 = load i32, ptr addrspace(1) %gep02, align 4 36 %sum02 = add i32 %sum01, %val02 37 %val03 = load i32, ptr addrspace(1) %gep03, align 4 38 %sum03 = add i32 %sum02, %val03 39 %val04 = load i32, ptr addrspace(1) %gep04, align 4 40 %sum04 = add i32 %sum03, %val04 41 %val05 = load i32, ptr addrspace(1) %gep05, align 4 42 %sum05 = add i32 %sum04, %val05 43 %val06 = load i32, ptr addrspace(1) %gep06, align 4 44 %sum06 = add i32 %sum05, %val06 45 %val07 = load i32, ptr addrspace(1) %gep07, align 4 46 %sum07 = add i32 %sum06, %val07 47 %val08 = load i32, ptr addrspace(1) %gep08, align 4 48 %sum08 = add i32 %sum07, %val08 49 ret i32 %sum08 50 } 51 52 ; Function Attrs: nounwind readonly 53 declare ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token, i32 immarg, i32 immarg) #0 54 55 declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...) 56 57 ; Function Attrs: nounwind 58 declare void @llvm.stackprotector(ptr, ptr) #1 59 60 attributes #0 = { nounwind readonly } 61 attributes #1 = { nounwind } 62 63... 64--- 65name: test_spill 66alignment: 16 67exposesReturnsTwice: false 68legalized: false 69regBankSelected: false 70selected: false 71failedISel: false 72tracksRegLiveness: true 73hasWinCFI: false 74registers: 75 - { id: 0, class: gr64, preferred-register: '' } 76 - { id: 1, class: gr64, preferred-register: '' } 77 - { id: 2, class: gr64, preferred-register: '' } 78 - { id: 3, class: gr64, preferred-register: '' } 79 - { id: 4, class: gr64, preferred-register: '' } 80 - { id: 5, class: gr64, preferred-register: '' } 81 - { id: 6, class: gr64, preferred-register: '' } 82 - { id: 7, class: gr64, preferred-register: '' } 83 - { id: 8, class: gr64, preferred-register: '' } 84 - { id: 9, class: gr64, preferred-register: '' } 85 - { id: 10, class: gr64, preferred-register: '' } 86 - { id: 11, class: gr64, preferred-register: '' } 87 - { id: 12, class: gr64, preferred-register: '' } 88 - { id: 13, class: gr64, preferred-register: '' } 89 - { id: 14, class: gr64, preferred-register: '' } 90 - { id: 15, class: gr64, preferred-register: '' } 91 - { id: 16, class: gr64, preferred-register: '' } 92 - { id: 17, class: gr64, preferred-register: '' } 93 - { id: 18, class: gr32, preferred-register: '' } 94 - { id: 19, class: gr32, preferred-register: '' } 95 - { id: 20, class: gr32, preferred-register: '' } 96 - { id: 21, class: gr32, preferred-register: '' } 97 - { id: 22, class: gr32, preferred-register: '' } 98 - { id: 23, class: gr32, preferred-register: '' } 99 - { id: 24, class: gr32, preferred-register: '' } 100 - { id: 25, class: gr32, preferred-register: '' } 101 - { id: 26, class: gr32, preferred-register: '' } 102liveins: 103 - { reg: '$rdi', virtual-reg: '%0' } 104 - { reg: '$rsi', virtual-reg: '%1' } 105 - { reg: '$rdx', virtual-reg: '%2' } 106 - { reg: '$rcx', virtual-reg: '%3' } 107 - { reg: '$r8', virtual-reg: '%4' } 108 - { reg: '$r9', virtual-reg: '%5' } 109frameInfo: 110 isFrameAddressTaken: false 111 isReturnAddressTaken: false 112 hasStackMap: false 113 hasPatchPoint: false 114 stackSize: 0 115 offsetAdjustment: 0 116 maxAlignment: 8 117 adjustsStack: true 118 hasCalls: true 119 stackProtector: '' 120 maxCallFrameSize: 4294967295 121 cvBytesOfCalleeSavedRegisters: 0 122 hasOpaqueSPAdjustment: false 123 hasVAStart: false 124 hasMustTailInVarArgFunc: false 125 localFrameSize: 0 126 savePoint: '' 127 restorePoint: '' 128fixedStack: 129 - { id: 0, type: default, offset: 16, size: 8, alignment: 16, stack-id: default, 130 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 131 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 132 - { id: 1, type: default, offset: 8, size: 8, alignment: 8, stack-id: default, 133 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 134 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 135 - { id: 2, type: default, offset: 0, size: 8, alignment: 16, stack-id: default, 136 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 137 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 138stack: [] 139callSites: [] 140constants: [] 141machineFunctionInfo: {} 142body: | 143 bb.0 (%ir-block.0): 144 liveins: $rdi, $rsi, $rdx, $rcx, $r8, $r9 145 146 ; CHECK-LABEL: name: test_spill 147 ; CHECK: liveins: $rdi, $rsi, $rdx, $rcx, $r8, $r9 148 ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $r9 :: (store (s64) into %stack.0) 149 ; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $r8 :: (store (s64) into %stack.1) 150 ; CHECK: MOV64mr %stack.2, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.2) 151 ; CHECK: [[R1:%[0-9]+]]:gr64 = COPY $rdx 152 ; CHECK: [[R2:%[0-9]+]]:gr64 = COPY $rsi 153 ; CHECK: [[R3:%[0-9]+]]:gr64 = COPY $rdi 154 ; CHECK: [[R4:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16) 155 ; CHECK: [[R5:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.1) 156 ; CHECK: [[R6:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.2, align 16) 157 ; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 158 ; CHECK: [[R6]]:gr64, [[R5]]:gr64, [[R4]]:gr64, [[R1]]:gr64, [[R2]]:gr64, [[R3]]:gr64 = STATEPOINT 0, 0, 0, @func, 2, 0, 2, 0, 2, 0, 2, 9, [[R6]](tied-def 0), [[R5]](tied-def 1), [[R4]](tied-def 2), 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 1, 8, %stack.2, 0, [[R1]](tied-def 3), [[R2]](tied-def 4), [[R3]](tied-def 5), 2, 0, 2, 9, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, csr_64, implicit-def $rsp, implicit-def $ssp :: (load store (s64) on %stack.0), (load store (s64) on %stack.1), (load store (s64) on %stack.2) 159 ; CHECK: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 160 ; CHECK: [[RES:%[0-9]+]]:gr32 = MOV32rm [[R3]], 1, $noreg, 4, $noreg :: (load (s32) from %ir.gep00, addrspace 1) 161 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R2]], 1, $noreg, 8, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep01, addrspace 1) 162 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R1]], 1, $noreg, 12, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep02, addrspace 1) 163 ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %stack.2) 164 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm]], 1, $noreg, 16, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep03, addrspace 1) 165 ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm %stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %stack.1) 166 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm1]], 1, $noreg, 20, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep04, addrspace 1) 167 ; CHECK: [[MOV64rm2:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0) 168 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm2]], 1, $noreg, 24, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep05, addrspace 1) 169 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R4]], 1, $noreg, 28, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep06, addrspace 1) 170 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R5]], 1, $noreg, 32, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep07, addrspace 1) 171 ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R6]], 1, $noreg, 36, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep08, addrspace 1) 172 ; CHECK: $eax = COPY [[RES]] 173 ; CHECK: RET 0, $eax 174 %9:gr64 = COPY $r9 175 %10:gr64 = COPY $r8 176 %11:gr64 = COPY $rcx 177 %12:gr64 = COPY $rdx 178 %13:gr64 = COPY $rsi 179 %14:gr64 = COPY $rdi 180 %8:gr64 = MOV64rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.2, align 16) 181 %7:gr64 = MOV64rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.1) 182 %6:gr64 = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16) 183 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 184 %6:gr64, %7:gr64, %8:gr64, %9:gr64, %10:gr64, %11:gr64, %12:gr64, %13:gr64, %14:gr64 = STATEPOINT 0, 0, 0, @func, 2, 0, 2, 0, 2, 0, 2, 9, %6(tied-def 0), %7(tied-def 1), %8(tied-def 2), %9(tied-def 3), %10(tied-def 4), %11(tied-def 5), %12(tied-def 6), %13(tied-def 7), %14(tied-def 8), 2, 0, 2, 9, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, csr_64, implicit-def $rsp, implicit-def $ssp 185 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 186 %20:gr32 = MOV32rm %14, 1, $noreg, 4, $noreg :: (load (s32) from %ir.gep00, addrspace 1) 187 %20:gr32 = ADD32rm %20, %13, 1, $noreg, 8, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep01, addrspace 1) 188 %20:gr32 = ADD32rm %20, %12, 1, $noreg, 12, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep02, addrspace 1) 189 %20:gr32 = ADD32rm %20, %11, 1, $noreg, 16, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep03, addrspace 1) 190 %20:gr32 = ADD32rm %20, %10, 1, $noreg, 20, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep04, addrspace 1) 191 %20:gr32 = ADD32rm %20, %9, 1, $noreg, 24, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep05, addrspace 1) 192 %20:gr32 = ADD32rm %20, %8, 1, $noreg, 28, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep06, addrspace 1) 193 %20:gr32 = ADD32rm %20, %7, 1, $noreg, 32, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep07, addrspace 1) 194 %20:gr32 = ADD32rm %20, %6, 1, $noreg, 36, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep08, addrspace 1) 195 $eax = COPY %20 196 RET 0, killed $eax 197 198... 199