xref: /llvm-project/llvm/test/CodeGen/X86/sse-varargs.ll (revision 0aef747b846586c29ed3285bbed20a3d607576fa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
3define i32 @t() nounwind  {
4; CHECK-LABEL: t:
5; CHECK:       # %bb.0: # %entry
6; CHECK-NEXT:    pushl %ebp
7; CHECK-NEXT:    movl %esp, %ebp
8; CHECK-NEXT:    andl $-16, %esp
9; CHECK-NEXT:    subl $48, %esp
10; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [10,11,12,13]
11; CHECK-NEXT:    movaps %xmm0, {{[0-9]+}}(%esp)
12; CHECK-NEXT:    movl $1, (%esp)
13; CHECK-NEXT:    calll foo@PLT
14; CHECK-NEXT:    xorl %eax, %eax
15; CHECK-NEXT:    movl %ebp, %esp
16; CHECK-NEXT:    popl %ebp
17; CHECK-NEXT:    retl
18entry:
19	tail call void (i32, ...) @foo( i32 1, <4 x i32> < i32 10, i32 11, i32 12, i32 13 > ) nounwind
20	ret i32 0
21}
22
23declare void @foo(i32, ...)
24