xref: /llvm-project/llvm/test/CodeGen/X86/sse-align-5.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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4define <2 x i64> @bar(ptr %p) nounwind {
5; CHECK-LABEL: bar:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movaps (%rdi), %xmm0
8; CHECK-NEXT:    retq
9  %t = load <2 x i64>, ptr %p
10  ret <2 x i64> %t
11}
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