1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE2 4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefix=AVX 5; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX 6 7define float @test_sqrt_f32(float %a) { 8; SSE2-LABEL: test_sqrt_f32: 9; SSE2: ## %bb.0: 10; SSE2-NEXT: sqrtss %xmm0, %xmm0 11; SSE2-NEXT: retq 12; 13; AVX-LABEL: test_sqrt_f32: 14; AVX: ## %bb.0: 15; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 16; AVX-NEXT: retq 17 %res = call float @llvm.sqrt.f32(float %a) 18 ret float %res 19} 20declare float @llvm.sqrt.f32(float) nounwind readnone 21 22define double @test_sqrt_f64(double %a) { 23; SSE2-LABEL: test_sqrt_f64: 24; SSE2: ## %bb.0: 25; SSE2-NEXT: sqrtsd %xmm0, %xmm0 26; SSE2-NEXT: retq 27; 28; AVX-LABEL: test_sqrt_f64: 29; AVX: ## %bb.0: 30; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 31; AVX-NEXT: retq 32 %res = call double @llvm.sqrt.f64(double %a) 33 ret double %res 34} 35declare double @llvm.sqrt.f64(double) nounwind readnone 36 37 38