xref: /llvm-project/llvm/test/CodeGen/X86/splat-const.ll (revision 834cc88c5d08ca55664b7742590463de813d768f)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE
3; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
4; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2
5; This checks that lowering for creation of constant vectors is sane and
6; doesn't use redundant shuffles. (fixes PR22276)
7target triple = "x86_64-unknown-unknown"
8
9define <4 x i32> @zero_vector() {
10; SSE-LABEL: zero_vector:
11; SSE:       # %bb.0:
12; SSE-NEXT:    xorps %xmm0, %xmm0
13; SSE-NEXT:    retq
14;
15; AVX-LABEL: zero_vector:
16; AVX:       # %bb.0:
17; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
18; AVX-NEXT:    retq
19;
20; AVX2-LABEL: zero_vector:
21; AVX2:       # %bb.0:
22; AVX2-NEXT:    vxorps %xmm0, %xmm0, %xmm0
23; AVX2-NEXT:    retq
24  %zero = insertelement <4 x i32> undef, i32 0, i32 0
25  %splat = shufflevector <4 x i32> %zero, <4 x i32> undef, <4 x i32> zeroinitializer
26  ret <4 x i32> %splat
27}
28
29; Note that for the "const_vector" versions, lowering that uses a shuffle
30; instead of a load would be legitimate, if it's a single broadcast shuffle.
31; (as opposed to the previous mess)
32; However, this is not the current preferred lowering.
33define <4 x i32> @const_vector() {
34; SSE-LABEL: const_vector:
35; SSE:       # %bb.0:
36; SSE-NEXT:    movaps {{.*#+}} xmm0 = [42,42,42,42]
37; SSE-NEXT:    retq
38;
39; AVX-LABEL: const_vector:
40; AVX:       # %bb.0:
41; AVX-NEXT:    vbroadcastss {{.*#+}} xmm0 = [42,42,42,42]
42; AVX-NEXT:    retq
43;
44; AVX2-LABEL: const_vector:
45; AVX2:       # %bb.0:
46; AVX2-NEXT:    vbroadcastss {{.*#+}} xmm0 = [42,42,42,42]
47; AVX2-NEXT:    retq
48  %const = insertelement <4 x i32> undef, i32 42, i32 0
49  %splat = shufflevector <4 x i32> %const, <4 x i32> undef, <4 x i32> zeroinitializer
50  ret <4 x i32> %splat
51}
52