1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4; Verify that we don't crash when compiling this. We used to hit an 5; assert like this 6; 7; llc: ../include/llvm/CodeGen/ValueTypes.h:251: llvm::MVT llvm::EVT::getSimpleVT() const: Assertion `isSimple() && "Expected a SimpleValueType!"' failed. 8; 9; due to getFauxShuffleMask not checking that the VT was simple before a call 10; to getSimpleValueType(). 11 12define i1 @dont_hit_assert(i24 signext %d) { 13; CHECK-LABEL: dont_hit_assert: 14; CHECK: # %bb.0: # %for.cond 15; CHECK-NEXT: xorl %eax, %eax 16; CHECK-NEXT: retq 17for.cond: 18 %t0 = insertelement <8 x i24> zeroinitializer, i24 1, i32 0 19 %t5 = icmp slt <8 x i24> %t0, zeroinitializer 20 %t7 = icmp slt i24 0, %d 21 %rdx.shuf = shufflevector <8 x i1> %t5, <8 x i1> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> 22 %bin.rdx = and <8 x i1> %t5, %rdx.shuf 23 %rdx.shuf22 = shufflevector <8 x i1> %bin.rdx, <8 x i1> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 24 %bin.rdx23 = and <8 x i1> %bin.rdx, %rdx.shuf22 25 %rdx.shuf24 = shufflevector <8 x i1> %bin.rdx23, <8 x i1> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 26 %bin.rdx25 = and <8 x i1> %bin.rdx23, %rdx.shuf24 27 %t8 = extractelement <8 x i1> %bin.rdx25, i32 0 28 ret i1 %t8 29} 30