1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefixes=X86 3; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefixes=X64,X64-NOTBM,X64-NOBMI2 4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+tbm | FileCheck %s --check-prefixes=X64,X64-NOBMI2,X64-TBM 5; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+bmi2 | FileCheck %s --check-prefixes=X64,X64-NOTBM,X64-BMI2 6; rdar://7329206 7 8define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp { 9; X86-LABEL: t1: 10; X86: ## %bb.0: 11; X86-NEXT: xorl %eax, %eax 12; X86-NEXT: cmpw $27, {{[0-9]+}}(%esp) 13; X86-NEXT: setae %al 14; X86-NEXT: shll $5, %eax 15; X86-NEXT: retl 16; 17; X64-LABEL: t1: 18; X64: ## %bb.0: 19; X64-NEXT: xorl %eax, %eax 20; X64-NEXT: cmpw $27, %di 21; X64-NEXT: setae %al 22; X64-NEXT: shll $5, %eax 23; X64-NEXT: retq 24 %t0 = icmp ugt i16 %x, 26 25 %if = select i1 %t0, i16 32, i16 0 26 ret i16 %if 27} 28 29define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp { 30; X86-LABEL: t2: 31; X86: ## %bb.0: 32; X86-NEXT: xorl %eax, %eax 33; X86-NEXT: cmpw $26, {{[0-9]+}}(%esp) 34; X86-NEXT: setb %al 35; X86-NEXT: shll $5, %eax 36; X86-NEXT: retl 37; 38; X64-LABEL: t2: 39; X64: ## %bb.0: 40; X64-NEXT: xorl %eax, %eax 41; X64-NEXT: cmpw $26, %di 42; X64-NEXT: setb %al 43; X64-NEXT: shll $5, %eax 44; X64-NEXT: retq 45 %t0 = icmp ult i16 %x, 26 46 %if = select i1 %t0, i16 32, i16 0 47 ret i16 %if 48} 49 50define i64 @t3(i64 %x) nounwind readnone ssp { 51; X86-LABEL: t3: 52; X86: ## %bb.0: 53; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 54; X86-NEXT: cmpl $18, {{[0-9]+}}(%esp) 55; X86-NEXT: sbbl $0, %eax 56; X86-NEXT: setb %al 57; X86-NEXT: movzbl %al, %eax 58; X86-NEXT: shll $6, %eax 59; X86-NEXT: xorl %edx, %edx 60; X86-NEXT: retl 61; 62; X64-LABEL: t3: 63; X64: ## %bb.0: 64; X64-NEXT: xorl %eax, %eax 65; X64-NEXT: cmpq $18, %rdi 66; X64-NEXT: setb %al 67; X64-NEXT: shll $6, %eax 68; X64-NEXT: retq 69 %t0 = icmp ult i64 %x, 18 70 %if = select i1 %t0, i64 64, i64 0 71 ret i64 %if 72} 73 74@v4 = common global i32 0, align 4 75 76define i32 @t4(i32 %a) { 77; X86-LABEL: t4: 78; X86: ## %bb.0: 79; X86-NEXT: movl L_v4$non_lazy_ptr, %ecx 80; X86-NEXT: xorl %eax, %eax 81; X86-NEXT: cmpl $1, (%ecx) 82; X86-NEXT: adcw $1, %ax 83; X86-NEXT: shll $16, %eax 84; X86-NEXT: retl 85; 86; X64-LABEL: t4: 87; X64: ## %bb.0: 88; X64-NEXT: movq _v4@GOTPCREL(%rip), %rcx 89; X64-NEXT: xorl %eax, %eax 90; X64-NEXT: cmpl $1, (%rcx) 91; X64-NEXT: adcw $1, %ax 92; X64-NEXT: shll $16, %eax 93; X64-NEXT: retq 94 %t0 = load i32, ptr @v4, align 4 95 %not.tobool = icmp eq i32 %t0, 0 96 %conv.i = sext i1 %not.tobool to i16 97 %call.lobit = lshr i16 %conv.i, 15 98 %add.i.1 = add nuw nsw i16 %call.lobit, 1 99 %conv4.2 = zext i16 %add.i.1 to i32 100 %add = shl nuw nsw i32 %conv4.2, 16 101 ret i32 %add 102} 103 104define i8 @t5(i32 %a) { 105; X86-LABEL: t5: 106; X86: ## %bb.0: 107; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) 108; X86-NEXT: setns %al 109; X86-NEXT: retl 110; 111; X64-LABEL: t5: 112; X64: ## %bb.0: 113; X64-NEXT: testl %edi, %edi 114; X64-NEXT: setns %al 115; X64-NEXT: retq 116 %.lobit = lshr i32 %a, 31 117 %trunc = trunc i32 %.lobit to i8 118 %.not = xor i8 %trunc, 1 119 ret i8 %.not 120} 121 122define zeroext i1 @t6(i32 %a) { 123; X86-LABEL: t6: 124; X86: ## %bb.0: 125; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) 126; X86-NEXT: setns %al 127; X86-NEXT: retl 128; 129; X64-LABEL: t6: 130; X64: ## %bb.0: 131; X64-NEXT: testl %edi, %edi 132; X64-NEXT: setns %al 133; X64-NEXT: retq 134 %.lobit = lshr i32 %a, 31 135 %trunc = trunc i32 %.lobit to i1 136 %.not = xor i1 %trunc, 1 137 ret i1 %.not 138} 139 140; PR39174 141define zeroext i1 @t7(i32 %0) { 142; X86-LABEL: t7: 143; X86: ## %bb.0: 144; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 145; X86-NEXT: movl $19, %ecx 146; X86-NEXT: btl %eax, %ecx 147; X86-NEXT: setb %al 148; X86-NEXT: retl 149; 150; X64-LABEL: t7: 151; X64: ## %bb.0: 152; X64-NEXT: movl $19, %eax 153; X64-NEXT: btl %edi, %eax 154; X64-NEXT: setb %al 155; X64-NEXT: retq 156 %2 = trunc i32 %0 to i5 157 %3 = lshr i5 -13, %2 158 %4 = and i5 %3, 1 159 %5 = icmp ne i5 %4, 0 160 ret i1 %5 161} 162 163define zeroext i1 @t8(i8 %0, i8 %1) { 164; X86-LABEL: t8: 165; X86: ## %bb.0: 166; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 167; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 168; X86-NEXT: btl %eax, %ecx 169; X86-NEXT: setb %al 170; X86-NEXT: retl 171; 172; X64-LABEL: t8: 173; X64: ## %bb.0: 174; X64-NEXT: btl %esi, %edi 175; X64-NEXT: setb %al 176; X64-NEXT: retq 177 %3 = lshr i8 %0, %1 178 %4 = and i8 %3, 1 179 %5 = icmp ne i8 %4, 0 180 ret i1 %5 181} 182 183define i64 @t9(i32 %0, i32 %1) { 184; X86-LABEL: t9: 185; X86: ## %bb.0: 186; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 187; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 188; X86-NEXT: xorl %eax, %eax 189; X86-NEXT: btl %edx, %ecx 190; X86-NEXT: setb %al 191; X86-NEXT: xorl %edx, %edx 192; X86-NEXT: retl 193; 194; X64-NOBMI2-LABEL: t9: 195; X64-NOBMI2: ## %bb.0: 196; X64-NOBMI2-NEXT: xorl %eax, %eax 197; X64-NOBMI2-NEXT: btl %esi, %edi 198; X64-NOBMI2-NEXT: setb %al 199; X64-NOBMI2-NEXT: retq 200; 201; X64-BMI2-LABEL: t9: 202; X64-BMI2: ## %bb.0: 203; X64-BMI2-NEXT: shrxl %esi, %edi, %eax 204; X64-BMI2-NEXT: andl $1, %eax 205; X64-BMI2-NEXT: retq 206 %3 = lshr i32 %0, %1 207 %4 = and i32 %3, 1 208 %5 = icmp ne i32 %4, 0 209 %6 = zext i1 %5 to i64 210 ret i64 %6 211} 212 213define i32 @t10(i32 %0, i32 %1) { 214; X86-LABEL: t10: 215; X86: ## %bb.0: 216; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 217; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 218; X86-NEXT: xorl %eax, %eax 219; X86-NEXT: btl %edx, %ecx 220; X86-NEXT: setae %al 221; X86-NEXT: retl 222; 223; X64-LABEL: t10: 224; X64: ## %bb.0: 225; X64-NEXT: xorl %eax, %eax 226; X64-NEXT: btl %esi, %edi 227; X64-NEXT: setae %al 228; X64-NEXT: retq 229 %3 = lshr i32 %0, %1 230 %4 = and i32 %3, 1 231 %5 = xor i32 %4, 1 232 ret i32 %5 233} 234 235define i32 @t11(i32 %0, i32 %1) { 236; X86-LABEL: t11: 237; X86: ## %bb.0: 238; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 239; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 240; X86-NEXT: xorl %eax, %eax 241; X86-NEXT: btl %edx, %ecx 242; X86-NEXT: setae %al 243; X86-NEXT: retl 244; 245; X64-LABEL: t11: 246; X64: ## %bb.0: 247; X64-NEXT: xorl %eax, %eax 248; X64-NEXT: btl %esi, %edi 249; X64-NEXT: setae %al 250; X64-NEXT: retq 251 %3 = xor i32 %0, -1 252 %4 = lshr i32 %3, %1 253 %5 = and i32 %4, 1 254 ret i32 %5 255} 256 257define i32 @t12(i32 %0, i32 %1) { 258; X86-LABEL: t12: 259; X86: ## %bb.0: 260; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 261; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 262; X86-NEXT: xorl %eax, %eax 263; X86-NEXT: btl %edx, %ecx 264; X86-NEXT: setb %al 265; X86-NEXT: retl 266; 267; X64-LABEL: t12: 268; X64: ## %bb.0: 269; X64-NEXT: xorl %eax, %eax 270; X64-NEXT: btl %esi, %edi 271; X64-NEXT: setb %al 272; X64-NEXT: retq 273 %3 = xor i32 %0, -1 274 %4 = lshr i32 %3, %1 275 %5 = and i32 %4, 1 276 %6 = xor i32 %5, 1 277 ret i32 %6 278} 279 280define i16 @shift_and(i16 %a) { 281; X86-LABEL: shift_and: 282; X86: ## %bb.0: 283; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax 284; X86-NEXT: andb $4, %al 285; X86-NEXT: shrb $2, %al 286; X86-NEXT: movzbl %al, %eax 287; X86-NEXT: ## kill: def $ax killed $ax killed $eax 288; X86-NEXT: retl 289; 290; X64-NOTBM-LABEL: shift_and: 291; X64-NOTBM: ## %bb.0: 292; X64-NOTBM-NEXT: movl %edi, %eax 293; X64-NOTBM-NEXT: shrl $10, %eax 294; X64-NOTBM-NEXT: andl $1, %eax 295; X64-NOTBM-NEXT: ## kill: def $ax killed $ax killed $eax 296; X64-NOTBM-NEXT: retq 297; 298; X64-TBM-LABEL: shift_and: 299; X64-TBM: ## %bb.0: 300; X64-TBM-NEXT: bextrl $266, %edi, %eax ## imm = 0x10A 301; X64-TBM-NEXT: ## kill: def $ax killed $ax killed $eax 302; X64-TBM-NEXT: retq 303 %and = and i16 %a, 1024 304 %cmp = icmp ne i16 %and, 0 305 %conv = zext i1 %cmp to i16 306 ret i16 %conv 307} 308 309define i32 @PR55138(i32 %x) { 310; X86-LABEL: PR55138: 311; X86: ## %bb.0: 312; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 313; X86-NEXT: andl $15, %ecx 314; X86-NEXT: movl $27030, %edx ## imm = 0x6996 315; X86-NEXT: xorl %eax, %eax 316; X86-NEXT: btl %ecx, %edx 317; X86-NEXT: setb %al 318; X86-NEXT: retl 319; 320; X64-NOBMI2-LABEL: PR55138: 321; X64-NOBMI2: ## %bb.0: 322; X64-NOBMI2-NEXT: andl $15, %edi 323; X64-NOBMI2-NEXT: movl $27030, %ecx ## imm = 0x6996 324; X64-NOBMI2-NEXT: xorl %eax, %eax 325; X64-NOBMI2-NEXT: btl %edi, %ecx 326; X64-NOBMI2-NEXT: setb %al 327; X64-NOBMI2-NEXT: retq 328; 329; X64-BMI2-LABEL: PR55138: 330; X64-BMI2: ## %bb.0: 331; X64-BMI2-NEXT: andb $15, %dil 332; X64-BMI2-NEXT: movl $27030, %eax ## imm = 0x6996 333; X64-BMI2-NEXT: shrxl %edi, %eax, %eax 334; X64-BMI2-NEXT: andl $1, %eax 335; X64-BMI2-NEXT: retq 336 %urem = and i32 %x, 15 337 %shr = lshr i32 27030, %urem 338 %and = and i32 %shr, 1 339 ret i32 %and 340} 341 342define i64 @pr63055(double %arg) { 343; X86-LABEL: pr63055: 344; X86: ## %bb.0: 345; X86-NEXT: movl $1, %eax 346; X86-NEXT: xorl %edx, %edx 347; X86-NEXT: retl 348; 349; X64-LABEL: pr63055: 350; X64: ## %bb.0: 351; X64-NEXT: movl $1, %eax 352; X64-NEXT: retq 353 %fcmp = fcmp une double 0x7FF8000000000000, %arg 354 %ext = zext i1 %fcmp to i64 355 ret i64 %ext 356} 357