xref: /llvm-project/llvm/test/CodeGen/X86/select_const_i128.ll (revision f30188797453fc9bccb0ba9e8bdb8fd47369dfa7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 -mattr=+ndd | FileCheck --check-prefix=NDD %s
4
5define i128 @select_eq_i128(ptr %a) {
6; CHECK-LABEL: select_eq_i128:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    movdqa (%rdi), %xmm0
9; CHECK-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
10; CHECK-NEXT:    xorl %eax, %eax
11; CHECK-NEXT:    ptest %xmm0, %xmm0
12; CHECK-NEXT:    setne %al
13; CHECK-NEXT:    addq $-1, %rax
14; CHECK-NEXT:    movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF
15; CHECK-NEXT:    adcq $0, %rdx
16; CHECK-NEXT:    retq
17;
18; NDD-LABEL: select_eq_i128:
19; NDD:       # %bb.0:
20; NDD-NEXT:    movdqa (%rdi), %xmm0
21; NDD-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
22; NDD-NEXT:    xorl %eax, %eax
23; NDD-NEXT:    ptest %xmm0, %xmm0
24; NDD-NEXT:    setne %al
25; NDD-NEXT:    addq $-1, %rax
26; NDD-NEXT:    movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF
27; NDD-NEXT:    adcq $0, %rdx
28; NDD-NEXT:    retq
29  %1 = load i128, ptr %a, align 16
30  %cmp = icmp eq i128 %1, 1
31  %cond = select i1 %cmp, i128 170141183460469231731687303715884105727, i128 -170141183460469231731687303715884105728
32  ret i128 %cond
33}
34