1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s 3 4define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 5; CHECK-LABEL: test1: 6; CHECK: # %bb.0: 7; CHECK-NEXT: vcmpnleps %xmm0, %xmm1, %xmm0 8; CHECK-NEXT: vandps %xmm2, %xmm0, %xmm0 9; CHECK-NEXT: retq 10 %f = fcmp ult <4 x float> %a, %b 11 %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> zeroinitializer 12 ret <4 x i32> %r 13} 14 15define <4 x i32> @test2(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 16; CHECK-LABEL: test2: 17; CHECK: # %bb.0: 18; CHECK-NEXT: vcmpnleps %xmm0, %xmm1, %xmm0 19; CHECK-NEXT: vorps %xmm2, %xmm0, %xmm0 20; CHECK-NEXT: retq 21 %f = fcmp ult <4 x float> %a, %b 22 %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c 23 ret <4 x i32> %r 24} 25 26define <4 x i32> @test3(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 27; CHECK-LABEL: test3: 28; CHECK: # %bb.0: 29; CHECK-NEXT: vcmpleps %xmm0, %xmm1, %xmm0 30; CHECK-NEXT: vandps %xmm2, %xmm0, %xmm0 31; CHECK-NEXT: retq 32 %f = fcmp ult <4 x float> %a, %b 33 %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> %c 34 ret <4 x i32> %r 35} 36 37define <4 x i32> @test4(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 38; CHECK-LABEL: test4: 39; CHECK: # %bb.0: 40; CHECK-NEXT: vcmpleps %xmm0, %xmm1, %xmm0 41; CHECK-NEXT: vorps %xmm2, %xmm0, %xmm0 42; CHECK-NEXT: retq 43 %f = fcmp ult <4 x float> %a, %b 44 %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> 45 ret <4 x i32> %r 46} 47 48define <4 x i32> @test5(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 49; CHECK-LABEL: test5: 50; CHECK: # %bb.0: 51; CHECK-NEXT: vcmpnleps %xmm0, %xmm1, %xmm0 52; CHECK-NEXT: retq 53 %f = fcmp ult <4 x float> %a, %b 54 %r = sext <4 x i1> %f to <4 x i32> 55 ret <4 x i32> %r 56} 57 58define <4 x i32> @test6(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { 59; CHECK-LABEL: test6: 60; CHECK: # %bb.0: 61; CHECK-NEXT: vcmpleps %xmm0, %xmm1, %xmm0 62; CHECK-NEXT: retq 63 %not.f = fcmp oge <4 x float> %a, %b 64 %r = sext <4 x i1> %not.f to <4 x i32> 65 ret <4 x i32> %r 66} 67 68define <4 x i32> @test7(<4 x float> %a, <4 x float> %b, ptr %p) { 69; CHECK-LABEL: test7: 70; CHECK: # %bb.0: 71; CHECK-NEXT: vcmpnleps %xmm0, %xmm1, %xmm0 72; CHECK-NEXT: vandps (%rdi), %xmm0, %xmm0 73; CHECK-NEXT: retq 74 %f = fcmp ult <4 x float> %a, %b 75 %l = load <4 x i32>, ptr %p, align 16 76 %r = select <4 x i1> %f, <4 x i32> %l, <4 x i32> zeroinitializer 77 ret <4 x i32> %r 78} 79 80; Repeat all with FP types for the select operands. Also, use different comparison predicates for better test coverage. 81 82define <2 x double> @test1f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 83; CHECK-LABEL: test1f: 84; CHECK: # %bb.0: 85; CHECK-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 86; CHECK-NEXT: vandpd %xmm2, %xmm0, %xmm0 87; CHECK-NEXT: retq 88 %f = fcmp ogt <2 x double> %a, %b 89 %r = select <2 x i1> %f, <2 x double> %c, <2 x double> zeroinitializer 90 ret <2 x double> %r 91} 92 93define <2 x double> @test2f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 94; CHECK-LABEL: test2f: 95; CHECK: # %bb.0: 96; CHECK-NEXT: vcmplepd %xmm0, %xmm1, %xmm0 97; CHECK-NEXT: vorpd %xmm2, %xmm0, %xmm0 98; CHECK-NEXT: retq 99 %f = fcmp oge <2 x double> %a, %b 100 %r = select <2 x i1> %f, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>, <2 x double> %c 101 ret <2 x double> %r 102} 103 104define <2 x double> @test3f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 105; CHECK-LABEL: test3f: 106; CHECK: # %bb.0: 107; CHECK-NEXT: vcmpnltpd %xmm1, %xmm0, %xmm0 108; CHECK-NEXT: vandpd %xmm2, %xmm0, %xmm0 109; CHECK-NEXT: retq 110 %f = fcmp olt <2 x double> %a, %b 111 %r = select <2 x i1> %f, <2 x double> zeroinitializer, <2 x double> %c 112 ret <2 x double> %r 113} 114 115define <2 x double> @test4f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 116; CHECK-LABEL: test4f: 117; CHECK: # %bb.0: 118; CHECK-NEXT: vcmpnlepd %xmm1, %xmm0, %xmm0 119; CHECK-NEXT: vorpd %xmm2, %xmm0, %xmm0 120; CHECK-NEXT: retq 121 %f = fcmp ole <2 x double> %a, %b 122 %r = select <2 x i1> %f, <2 x double> %c, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff> 123 ret <2 x double> %r 124} 125 126define <2 x double> @test5f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 127; CHECK-LABEL: test5f: 128; CHECK: # %bb.0: 129; CHECK-NEXT: vcmpnlepd %xmm1, %xmm0, %xmm0 130; CHECK-NEXT: retq 131 %f = fcmp ugt <2 x double> %a, %b 132 %r = select <2 x i1> %f, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>, <2 x double> zeroinitializer 133 ret <2 x double> %r 134} 135 136define <2 x double> @test6f(<2 x double> %a, <2 x double> %b, <2 x double> %c) { 137; CHECK-LABEL: test6f: 138; CHECK: # %bb.0: 139; CHECK-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 140; CHECK-NEXT: retq 141 %f = fcmp ule <2 x double> %a, %b 142 %r = select <2 x i1> %f, <2 x double> zeroinitializer, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff> 143 ret <2 x double> %r 144} 145 146define <2 x double> @test7f(<2 x double> %a, <2 x double> %b, ptr %p) { 147; CHECK-LABEL: test7f: 148; CHECK: # %bb.0: 149; CHECK-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0 150; CHECK-NEXT: vandpd (%rdi), %xmm0, %xmm0 151; CHECK-NEXT: retq 152 %f = fcmp oeq <2 x double> %a, %b 153 %l = load <2 x double>, ptr %p, align 16 154 %r = select <2 x i1> %f, <2 x double> %l, <2 x double> zeroinitializer 155 ret <2 x double> %r 156} 157 158define i1 @and(i32 %x, i32 %y, i32 %z, i32 %w) { 159; CHECK-LABEL: and: 160; CHECK: # %bb.0: 161; CHECK-NEXT: cmpl %esi, %edi 162; CHECK-NEXT: sete %sil 163; CHECK-NEXT: cmpl %ecx, %edx 164; CHECK-NEXT: setg %al 165; CHECK-NEXT: andb %sil, %al 166; CHECK-NEXT: retq 167 %a = icmp eq i32 %x, %y 168 %b = icmp sgt i32 %z, %w 169 %s = select i1 %a, i1 %b, i1 false 170 ret i1 %s 171} 172 173define i1 @or(i32 %x, i32 %y, i32 %z, i32 %w) { 174; CHECK-LABEL: or: 175; CHECK: # %bb.0: 176; CHECK-NEXT: cmpl %esi, %edi 177; CHECK-NEXT: sete %sil 178; CHECK-NEXT: cmpl %ecx, %edx 179; CHECK-NEXT: setg %al 180; CHECK-NEXT: orb %sil, %al 181; CHECK-NEXT: retq 182 %a = icmp eq i32 %x, %y 183 %b = icmp sgt i32 %z, %w 184 %s = select i1 %a, i1 true, i1 %b 185 ret i1 %s 186} 187 188define i1 @and_not(i32 %x, i32 %y, i32 %z, i32 %w) { 189; CHECK-LABEL: and_not: 190; CHECK: # %bb.0: 191; CHECK-NEXT: cmpl %esi, %edi 192; CHECK-NEXT: setne %sil 193; CHECK-NEXT: cmpl %ecx, %edx 194; CHECK-NEXT: setg %al 195; CHECK-NEXT: andb %sil, %al 196; CHECK-NEXT: retq 197 %a = icmp eq i32 %x, %y 198 %b = icmp sgt i32 %z, %w 199 %s = select i1 %a, i1 false, i1 %b 200 ret i1 %s 201} 202 203define i1 @or_not(i32 %x, i32 %y, i32 %z, i32 %w) { 204; CHECK-LABEL: or_not: 205; CHECK: # %bb.0: 206; CHECK-NEXT: cmpl %esi, %edi 207; CHECK-NEXT: setne %sil 208; CHECK-NEXT: cmpl %ecx, %edx 209; CHECK-NEXT: setg %al 210; CHECK-NEXT: orb %sil, %al 211; CHECK-NEXT: retq 212 %a = icmp eq i32 %x, %y 213 %b = icmp sgt i32 %z, %w 214 %s = select i1 %a, i1 %b, i1 true 215 ret i1 %s 216} 217 218define <4 x i1> @and_vec(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) { 219; CHECK-LABEL: and_vec: 220; CHECK: # %bb.0: 221; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 222; CHECK-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm1 223; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0 224; CHECK-NEXT: retq 225 %a = icmp eq <4 x i32> %x, %y 226 %b = icmp sgt <4 x i32> %z, %w 227 %s = select <4 x i1> %a, <4 x i1> %b, <4 x i1> zeroinitializer 228 ret <4 x i1> %s 229} 230 231define <4 x i1> @or_vec(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) { 232; CHECK-LABEL: or_vec: 233; CHECK: # %bb.0: 234; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 235; CHECK-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm1 236; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0 237; CHECK-NEXT: retq 238 %a = icmp eq <4 x i32> %x, %y 239 %b = icmp sgt <4 x i32> %z, %w 240 %s = select <4 x i1> %a, <4 x i1> <i1 1, i1 1, i1 1, i1 1>, <4 x i1> %b 241 ret <4 x i1> %s 242} 243 244define <4 x i1> @and_not_vec(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) { 245; CHECK-LABEL: and_not_vec: 246; CHECK: # %bb.0: 247; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 248; CHECK-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm1 249; CHECK-NEXT: vpandn %xmm1, %xmm0, %xmm0 250; CHECK-NEXT: retq 251 %a = icmp eq <4 x i32> %x, %y 252 %b = icmp sgt <4 x i32> %z, %w 253 %s = select <4 x i1> %a, <4 x i1> zeroinitializer, <4 x i1> %b 254 ret <4 x i1> %s 255} 256 257define <4 x i1> @or_not_vec(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) { 258; CHECK-LABEL: or_not_vec: 259; CHECK: # %bb.0: 260; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 261; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 262; CHECK-NEXT: vpxor %xmm1, %xmm0, %xmm0 263; CHECK-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm1 264; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0 265; CHECK-NEXT: retq 266 %a = icmp eq <4 x i32> %x, %y 267 %b = icmp sgt <4 x i32> %z, %w 268 %s = select <4 x i1> %a, <4 x i1> %b, <4 x i1> <i1 1, i1 1, i1 1, i1 1> 269 ret <4 x i1> %s 270} 271