1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3 4 5define i32 @select_unsigned_lt_10_8_13(i32 %0) { 6; BASE-LABEL: select_unsigned_lt_10_8_13: 7; BASE: # %bb.0: 8; BASE-NEXT: xorl %eax, %eax 9; BASE-NEXT: cmpl $10, %edi 10; BASE-NEXT: setae %al 11; BASE-NEXT: leal 8(%rax,%rax,4), %eax 12; BASE-NEXT: retq 13; 14; SLOWLEA3-LABEL: select_unsigned_lt_10_8_13: 15; SLOWLEA3: # %bb.0: 16; SLOWLEA3-NEXT: xorl %eax, %eax 17; SLOWLEA3-NEXT: cmpl $10, %edi 18; SLOWLEA3-NEXT: setae %al 19; SLOWLEA3-NEXT: leal (%rax,%rax,4), %eax 20; SLOWLEA3-NEXT: addl $8, %eax 21; SLOWLEA3-NEXT: retq 22 %2 = icmp ult i32 %0, 10 23 %3 = select i1 %2, i32 8, i32 13 24 ret i32 %3 25} 26