xref: /llvm-project/llvm/test/CodeGen/X86/raoint-intrinsics-32.ll (revision 02d56801ee8e4fcce303a47e5fac1967f5660d38)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X64
3; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X86
4; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=EGPR
5
6define void @test_int_x86_aadd32(ptr %A, i32 %B) {
7; X64-LABEL: test_int_x86_aadd32:
8; X64:       # %bb.0:
9; X64-NEXT:    aaddl %esi, (%rdi) # encoding: [0x0f,0x38,0xfc,0x37]
10; X64-NEXT:    retq # encoding: [0xc3]
11;
12; X86-LABEL: test_int_x86_aadd32:
13; X86:       # %bb.0:
14; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
15; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
16; X86-NEXT:    aaddl %eax, (%ecx) # encoding: [0x0f,0x38,0xfc,0x01]
17; X86-NEXT:    retl # encoding: [0xc3]
18;
19; EGPR-LABEL: test_int_x86_aadd32:
20; EGPR:       # %bb.0:
21; EGPR-NEXT:    aaddl %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xfc,0x37]
22; EGPR-NEXT:    retq # encoding: [0xc3]
23  call void @llvm.x86.aadd32(ptr %A, i32 %B)
24  ret  void
25}
26declare void @llvm.x86.aadd32(ptr %A, i32 %B)
27
28define void @test_int_x86_aand32(ptr %A, i32 %B) {
29; X64-LABEL: test_int_x86_aand32:
30; X64:       # %bb.0:
31; X64-NEXT:    aandl %esi, (%rdi) # encoding: [0x66,0x0f,0x38,0xfc,0x37]
32; X64-NEXT:    retq # encoding: [0xc3]
33;
34; X86-LABEL: test_int_x86_aand32:
35; X86:       # %bb.0:
36; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
37; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
38; X86-NEXT:    aandl %eax, (%ecx) # encoding: [0x66,0x0f,0x38,0xfc,0x01]
39; X86-NEXT:    retl # encoding: [0xc3]
40;
41; EGPR-LABEL: test_int_x86_aand32:
42; EGPR:       # %bb.0:
43; EGPR-NEXT:    aandl %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0xfc,0x37]
44; EGPR-NEXT:    retq # encoding: [0xc3]
45  call void @llvm.x86.aand32(ptr %A, i32 %B)
46  ret  void
47}
48declare void @llvm.x86.aand32(ptr %A, i32 %B)
49
50define void @test_int_x86_aor32(ptr %A, i32 %B) {
51; X64-LABEL: test_int_x86_aor32:
52; X64:       # %bb.0:
53; X64-NEXT:    aorl %esi, (%rdi) # encoding: [0xf2,0x0f,0x38,0xfc,0x37]
54; X64-NEXT:    retq # encoding: [0xc3]
55;
56; X86-LABEL: test_int_x86_aor32:
57; X86:       # %bb.0:
58; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
59; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
60; X86-NEXT:    aorl %eax, (%ecx) # encoding: [0xf2,0x0f,0x38,0xfc,0x01]
61; X86-NEXT:    retl # encoding: [0xc3]
62;
63; EGPR-LABEL: test_int_x86_aor32:
64; EGPR:       # %bb.0:
65; EGPR-NEXT:    aorl %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xfc,0x37]
66; EGPR-NEXT:    retq # encoding: [0xc3]
67  call void @llvm.x86.aor32(ptr %A, i32 %B)
68  ret  void
69}
70declare void @llvm.x86.aor32(ptr %A, i32 %B)
71
72define void @test_int_x86_axor32(ptr %A, i32 %B) {
73; X64-LABEL: test_int_x86_axor32:
74; X64:       # %bb.0:
75; X64-NEXT:    axorl %esi, (%rdi) # encoding: [0xf3,0x0f,0x38,0xfc,0x37]
76; X64-NEXT:    retq # encoding: [0xc3]
77;
78; X86-LABEL: test_int_x86_axor32:
79; X86:       # %bb.0:
80; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
81; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
82; X86-NEXT:    axorl %eax, (%ecx) # encoding: [0xf3,0x0f,0x38,0xfc,0x01]
83; X86-NEXT:    retl # encoding: [0xc3]
84;
85; EGPR-LABEL: test_int_x86_axor32:
86; EGPR:       # %bb.0:
87; EGPR-NEXT:    axorl %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0xf3,0x0f,0x38,0xfc,0x37]
88; EGPR-NEXT:    retq # encoding: [0xc3]
89  call void @llvm.x86.axor32(ptr %A, i32 %B)
90  ret  void
91}
92declare void @llvm.x86.axor32(ptr %A, i32 %B)
93