xref: /llvm-project/llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll (revision 36230f90eef455b6af867ca7ad4ed25d00ad5d3b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64 %s -start-before=x86-isel -o - | FileCheck %s
3
4define i32 @add_shl_or_disjoint(i32 %x) {
5; CHECK-LABEL: add_shl_or_disjoint:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
8; CHECK-NEXT:    leal 165036822(,%rdi,4), %eax
9; CHECK-NEXT:    retq
10  %or = or disjoint i32 %x, 4027584529
11  %shl = shl i32 %or, 2
12  %add = add i32 %shl, 1234567890
13  ret i32 %add
14}
15
16