1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; RUN: llc < %s -mtriple=x86_64- -mcpu=x86-64-v4 | FileCheck %s 3 4define void @PR93000(ptr %a0, ptr %a1, ptr %a2, <32 x i16> %a3) { 5; CHECK-LABEL: PR93000: 6; CHECK: # %bb.0: # %Entry 7; CHECK-NEXT: movl (%rdi), %eax 8; CHECK-NEXT: addq $4, %rdi 9; CHECK-NEXT: .p2align 4 10; CHECK-NEXT: .LBB0_1: # %Loop 11; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 12; CHECK-NEXT: kmovd %eax, %k1 13; CHECK-NEXT: knotd %k1, %k2 14; CHECK-NEXT: vpblendmw (%rsi), %zmm0, %zmm1 {%k1} 15; CHECK-NEXT: vmovdqu16 (%rdx), %zmm1 {%k2} 16; CHECK-NEXT: vmovdqu64 %zmm1, (%rsi) 17; CHECK-NEXT: movl (%rdi), %eax 18; CHECK-NEXT: addq $4, %rdi 19; CHECK-NEXT: testl %eax, %eax 20; CHECK-NEXT: jne .LBB0_1 21; CHECK-NEXT: # %bb.2: # %Then 22; CHECK-NEXT: vzeroupper 23; CHECK-NEXT: retq 24Entry: 25 %pre = load i32, ptr %a0, align 4 26 br label %Loop 27 28Loop: ; preds = %Loop, %Entry 29 %p = phi i32 [ %limit, %Loop ], [ %pre, %Entry ] 30 %lsr.iv.pn = phi ptr [ %lsr.iv, %Loop ], [ %a0, %Entry ] 31 %lsr.iv = getelementptr i8, ptr %lsr.iv.pn, i64 4 32 %pn = xor i32 %p, -1 33 %m = bitcast i32 %p to <32 x i1> 34 %mn = bitcast i32 %pn to <32 x i1> 35 %mload0 = tail call <32 x i16> @llvm.masked.load.v32i16.p0(ptr %a1, i32 2, <32 x i1> %m, <32 x i16> %a3) 36 %mload1 = tail call <32 x i16> @llvm.masked.load.v32i16.p0(ptr %a2, i32 2, <32 x i1> %mn, <32 x i16> %mload0) 37 store <32 x i16> %mload1, ptr %a1, align 2 38 %limit = load i32, ptr %lsr.iv, align 4 39 %icmp = icmp eq i32 %limit, 0 40 br i1 %icmp, label %Then, label %Loop 41 42Then: ; preds = %Loop 43 ret void 44} 45