xref: /llvm-project/llvm/test/CodeGen/X86/pr92720.ll (revision cf128305bdada3ffb34054813a855d80b3948025)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
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4; Make sure we don't crash when shrinking the shift amount before legalization.
5define i64 @pr92720(i64 %x) {
6; CHECK-LABEL: pr92720:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    movabsq $8589934592, %rax # imm = 0x200000000
9; CHECK-NEXT:    retq
10  %or = or i64 %x, 255
11  %sub = sub i64 0, %or
12  %shl = shl i64 1, %sub
13  %sext = shl i64 %shl, 32
14  ret i64 %sext
15}
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