1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1 3; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2 4 5; PR90847 - failure to peek through FREEZE(SETCC()) results in VPMOVSMSKB(TRUNC()) instead of VMOVMSKPS 6 7define i32 @PR90847(<8 x float> %x) nounwind { 8; AVX1-LABEL: PR90847: 9; AVX1: # %bb.0: # %entry 10; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm0[1,0,3,2,5,4,7,6] 11; AVX1-NEXT: vminps %ymm1, %ymm0, %ymm1 12; AVX1-NEXT: vshufpd {{.*#+}} ymm2 = ymm1[1,0,3,2] 13; AVX1-NEXT: vminps %ymm2, %ymm1, %ymm1 14; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,0,1] 15; AVX1-NEXT: vminps %ymm2, %ymm1, %ymm1 16; AVX1-NEXT: vcmpeqps %ymm0, %ymm1, %ymm0 17; AVX1-NEXT: vmovmskps %ymm0, %ecx 18; AVX1-NEXT: movl $32, %eax 19; AVX1-NEXT: rep bsfl %ecx, %eax 20; AVX1-NEXT: vzeroupper 21; AVX1-NEXT: retq 22; 23; AVX2-LABEL: PR90847: 24; AVX2: # %bb.0: # %entry 25; AVX2-NEXT: vshufps {{.*#+}} ymm1 = ymm0[1,0,3,2,5,4,7,6] 26; AVX2-NEXT: vminps %ymm1, %ymm0, %ymm1 27; AVX2-NEXT: vshufpd {{.*#+}} ymm2 = ymm1[1,0,3,2] 28; AVX2-NEXT: vminps %ymm2, %ymm1, %ymm1 29; AVX2-NEXT: vpermpd {{.*#+}} ymm2 = ymm1[2,3,0,1] 30; AVX2-NEXT: vminps %ymm2, %ymm1, %ymm1 31; AVX2-NEXT: vcmpeqps %ymm0, %ymm1, %ymm0 32; AVX2-NEXT: vmovmskps %ymm0, %ecx 33; AVX2-NEXT: movl $32, %eax 34; AVX2-NEXT: rep bsfl %ecx, %eax 35; AVX2-NEXT: vzeroupper 36; AVX2-NEXT: retq 37entry: 38 %shuf1 = shufflevector <8 x float> %x, <8 x float> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6> 39 %min1 = tail call noundef <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %x, <8 x float> %shuf1) 40 %shuf2 = shufflevector <8 x float> %min1, <8 x float> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5> 41 %min2 = tail call noundef <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %min1, <8 x float> %shuf2) 42 %shuf3 = shufflevector <8 x float> %min2, <8 x float> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 43 %min3 = tail call noundef <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %min2, <8 x float> %shuf3) 44 %fcmp = fcmp oeq <8 x float> %min3, %x 45 %mask = bitcast <8 x i1> %fcmp to i8 46 %zext = zext i8 %mask to i32 47 %cmp = icmp eq i8 %mask, 0 48 %tz = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %zext, i1 false) 49 %conv = select i1 %cmp, i32 undef, i32 %tz 50 ret i32 %conv 51} 52