1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-evex512 < %s | FileCheck %s 3 4define void @PR90844() { 5; CHECK-LABEL: PR90844: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 8; CHECK-NEXT: vmovaps %xmm0, (%rax) 9; CHECK-NEXT: retq 10entry: 11 %0 = tail call <2 x i32> @llvm.fshl.v2i32(<2 x i32> poison, <2 x i32> poison, <2 x i32> <i32 8, i32 24>) 12 %1 = and <2 x i32> %0, <i32 16711935, i32 -134152448> 13 %2 = or disjoint <2 x i32> zeroinitializer, %1 14 %3 = zext <2 x i32> %2 to <2 x i64> 15 %4 = shl nuw <2 x i64> %3, <i64 32, i64 32> 16 %5 = or disjoint <2 x i64> %4, zeroinitializer 17 store <2 x i64> %5, ptr poison, align 16 18 ret void 19} 20 21define void @foo(ptr %0) { 22; CHECK-LABEL: foo: 23; CHECK: # %bb.0: # %entry 24; CHECK-NEXT: vpbroadcastw {{.*#+}} ymm0 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] 25; CHECK-NEXT: vpxor 32(%rdi), %ymm0, %ymm1 26; CHECK-NEXT: vpxor (%rdi), %ymm0, %ymm0 27; CHECK-NEXT: vmovdqa %ymm0, (%rdi) 28; CHECK-NEXT: vmovdqa %ymm1, 32(%rdi) 29; CHECK-NEXT: vzeroupper 30; CHECK-NEXT: retq 31entry: 32 %1 = load <32 x half>, ptr %0 33 %2 = fneg <32 x half> %1 34 store <32 x half> %2, ptr %0 35 ret void 36} 37