xref: /llvm-project/llvm/test/CodeGen/X86/pr90703.ll (revision 687039bce91e90f87d68fb0c409baffaae16649e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi | FileCheck %s
3
4define i64 @pr90730(i64 %x, i64 %y, ptr %p) {
5; CHECK-LABEL: pr90730:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    movabsq $33181731808, %rax # imm = 0x7B9C90BE0
8; CHECK-NEXT:    andnq %rax, %rdi, %rax
9; CHECK-NEXT:    movq $0, (%rdx)
10; CHECK-NEXT:    retq
11entry:
12  %ext = and i64 %y, 1
13  %xor1 = xor i64 %ext, 33181731817
14  %and1 = and i64 %xor1, %x
15  store i64 %and1, ptr %p, align 4
16  %v = load i64, ptr %p, align 4
17  %and2 = and i64 %v, 33181731808
18  %xor2 = xor i64 %and2, 33181731808
19  store i64 0, ptr %p, align 4
20  ret i64 %xor2
21}
22