1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s 3; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s 4 5define i16 @mulhs(i16 %a0, i16 %a1) { 6; CHECK-LABEL: mulhs: 7; CHECK: # %bb.0: 8; CHECK-NEXT: movswl %di, %ecx 9; CHECK-NEXT: movswl %si, %eax 10; CHECK-NEXT: imull %ecx, %eax 11; CHECK-NEXT: shrl $16, %eax 12; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 13; CHECK-NEXT: retq 14 %x0 = sext i16 %a0 to i32 15 %x1 = sext i16 %a1 to i32 16 %v0 = insertelement <1 x i32> <i32 undef>, i32 %x0, i32 0 17 %v1 = insertelement <1 x i32> <i32 undef>, i32 %x1, i32 0 18 %mul = mul nsw <1 x i32> %v0, %v1 19 %lshr = lshr <1 x i32> %mul, <i32 16> 20 %trunc = trunc <1 x i32> %lshr to <1 x i16> 21 %res = extractelement <1 x i16> %trunc, i32 0 22 ret i16 %res 23} 24 25define i16 @mulhu(i16 %a0, i16 %a1) { 26; CHECK-LABEL: mulhu: 27; CHECK: # %bb.0: 28; CHECK-NEXT: movzwl %di, %ecx 29; CHECK-NEXT: movzwl %si, %eax 30; CHECK-NEXT: imull %ecx, %eax 31; CHECK-NEXT: shrl $16, %eax 32; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 33; CHECK-NEXT: retq 34 %x0 = zext i16 %a0 to i32 35 %x1 = zext i16 %a1 to i32 36 %v0 = insertelement <1 x i32> <i32 undef>, i32 %x0, i32 0 37 %v1 = insertelement <1 x i32> <i32 undef>, i32 %x1, i32 0 38 %mul = mul nsw <1 x i32> %v0, %v1 39 %lshr = lshr <1 x i32> %mul, <i32 16> 40 %trunc = trunc <1 x i32> %lshr to <1 x i16> 41 %res = extractelement <1 x i16> %trunc, i32 0 42 ret i16 %res 43} 44