xref: /llvm-project/llvm/test/CodeGen/X86/pr57474.ll (revision 0c5b0b50c22d215177f7cdacf533444665ffd864)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
3
4define void @PR57474() nounwind {
5; CHECK-LABEL: PR57474:
6; CHECK:       # %bb.0: # %BB
7; CHECK-NEXT:    pushq %rbp
8; CHECK-NEXT:    movq %rsp, %rbp
9; CHECK-NEXT:    movq %rsp, %rax
10; CHECK-NEXT:    leaq -16(%rax), %rsp
11; CHECK-NEXT:    movw $-32768, -16(%rax) # imm = 0x8000
12; CHECK-NEXT:    movq %rbp, %rsp
13; CHECK-NEXT:    popq %rbp
14; CHECK-NEXT:    retq
15BB:
16  br label %BB1
17
18BB1:                                              ; preds = %BB
19  %A = alloca <1 x i16>, align 2
20  %L1 = load <1 x i16>, ptr %A, align 2
21  %I = insertelement <1 x i16> %L1, i16 -1, i16 0
22  %B6 = add <1 x i16> %I, %I
23  %B3 = srem <1 x i16> %B6, %I
24  %B1 = add <1 x i16> %B3, %B3
25  %B5 = sdiv <1 x i16> %B1, %I
26  %B4 = udiv <1 x i16> %B3, <i16 -32768>
27  %B2 = or <1 x i16> %B4, %B5
28  %B = lshr <1 x i16> <i16 -32768>, %B2
29  store <1 x i16> %B, ptr %A, align 2
30  ret void
31}
32