xref: /llvm-project/llvm/test/CodeGen/X86/pr56103.ll (revision 02ba5b8c6b9f0c1ce6df421db5dd5eb307d7d27d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-linux-generic | FileCheck %s
3
4@e = global i16 0, align 2
5@a = global i32 0, align 4
6@c = global i32 0, align 4
7@b = global i64 0, align 8
8
9; Check the test instruction won't be optimizated by peephole opt.
10
11define dso_local i32 @main() nounwind {
12; CHECK-LABEL: main:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    movq e@GOTPCREL(%rip), %rax
15; CHECK-NEXT:    movw $1, (%rax)
16; CHECK-NEXT:    movq b@GOTPCREL(%rip), %rax
17; CHECK-NEXT:    movq $1, (%rax)
18; CHECK-NEXT:    movq a@GOTPCREL(%rip), %rax
19; CHECK-NEXT:    movl (%rax), %ecx
20; CHECK-NEXT:    movl $-2, %eax
21; CHECK-NEXT:    sarl %cl, %eax
22; CHECK-NEXT:    movq c@GOTPCREL(%rip), %rdx
23; CHECK-NEXT:    movl (%rdx), %edx
24; CHECK-NEXT:    decl %edx
25; CHECK-NEXT:    movzwl %ax, %eax
26; CHECK-NEXT:    decl %eax
27; CHECK-NEXT:    xorl %edx, %eax
28; CHECK-NEXT:    notl %ecx
29; CHECK-NEXT:    andl %eax, %ecx
30; CHECK-NEXT:    testq %rcx, %rcx
31; CHECK-NEXT:    jle .LBB0_2
32; CHECK-NEXT:  # %bb.1: # %if.end
33; CHECK-NEXT:    xorl %eax, %eax
34; CHECK-NEXT:    retq
35; CHECK-NEXT:  .LBB0_2: # %if.then
36; CHECK-NEXT:    pushq %rax
37; CHECK-NEXT:    callq abort@PLT
38entry:
39  store i16 1, ptr @e, align 2
40  store i64 1, ptr @b, align 8
41  %0 = load i32, ptr @a, align 4
42  %shr = ashr i32 -2, %0
43  %1 = load i32, ptr @c, align 4
44  %sub = add i32 %1, -1
45  %conv2 = zext i32 %sub to i64
46  %2 = and i32 %shr, 65535
47  %conv3 = zext i32 %2 to i64
48  %sub4 = add nsw i64 %conv3, -1
49  %xor = xor i64 %sub4, %conv2
50  %neg5 = xor i32 %0, -1
51  %conv6 = sext i32 %neg5 to i64
52  %and = and i64 %xor, %conv6
53  %cmp = icmp slt i64 %and, 1
54  br i1 %cmp, label %if.then, label %if.end
55
56if.then:                                          ; preds = %entry
57  call void @abort() #2
58  unreachable
59
60if.end:                                           ; preds = %entry
61  ret i32 0
62}
63
64declare void @abort()
65