xref: /llvm-project/llvm/test/CodeGen/X86/pr54369.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-- -O0 < %s | FileCheck %s
3
4define i64 @adder(i64 %lhs, i64 %rhs) {
5; CHECK-LABEL: adder:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    addq %rsi, %rdi
8; CHECK-NEXT:    seto %dl
9; CHECK-NEXT:    xorl %eax, %eax
10; CHECK-NEXT:    # kill: def $rax killed $eax
11; CHECK-NEXT:    movl $148, %ecx
12; CHECK-NEXT:    testb $1, %dl
13; CHECK-NEXT:    cmovneq %rcx, %rax
14; CHECK-NEXT:    retq
15	%res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %lhs, i64 %rhs)
16	%errorbit = extractvalue { i64, i1 } %res, 1
17	%errorval = select i1 %errorbit, i64 148, i64 0
18	ret i64 %errorval
19}
20
21@a = global i32 0, align 4
22
23define i64 @adder_constexpr(i64 %lhs, i64 %rhs) {
24; CHECK-LABEL: adder_constexpr:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    addq %rsi, %rdi
27; CHECK-NEXT:    seto %dl
28; CHECK-NEXT:    movq a@GOTPCREL(%rip), %rax
29; CHECK-NEXT:    addq $5, %rax
30; CHECK-NEXT:    movl $148, %ecx
31; CHECK-NEXT:    testb $1, %dl
32; CHECK-NEXT:    cmovneq %rcx, %rax
33; CHECK-NEXT:    retq
34  %res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %lhs, i64 %rhs)
35  %errorbit = extractvalue { i64, i1 } %res, 1
36  %errorval = select i1 %errorbit, i64 148, i64 add (i64 ptrtoint (ptr @a to i64), i64 5)
37  ret i64 %errorval
38}
39
40declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
41