xref: /llvm-project/llvm/test/CodeGen/X86/pr48727.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
3
4define void @PR48727() {
5; CHECK-LABEL: PR48727:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    vcvttpd2dqy 0, %xmm0
8; CHECK-NEXT:    vcvttpd2dqy 128, %xmm1
9; CHECK-NEXT:    movq (%rax), %rax
10; CHECK-NEXT:    vcvttpd2dqy 160, %xmm2
11; CHECK-NEXT:    vinserti128 $1, %xmm2, %ymm1, %ymm1
12; CHECK-NEXT:    vcvttpd2dqy (%rax), %xmm2
13; CHECK-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
14; CHECK-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
15; CHECK-NEXT:    vpmovdw %zmm0, %ymm0
16; CHECK-NEXT:    vmovdqu %ymm0, 16(%rax)
17; CHECK-NEXT:    vzeroupper
18; CHECK-NEXT:    retq
19entry:
20  %0 = load ptr, ptr undef, align 8
21  %wide.load.2 = load <4 x double>, ptr null, align 16
22  %1 = fptosi <4 x double> %wide.load.2 to <4 x i16>
23  %2 = getelementptr inbounds [100 x [100 x i16]], ptr %0, i64 0, i64 0, i64 8
24  store <4 x i16> %1, ptr %2, align 8
25  %wide.load.3 = load <4 x double>, ptr undef, align 16, !invariant.load !0, !noalias !1
26  %3 = fptosi <4 x double> %wide.load.3 to <4 x i16>
27  %4 = getelementptr inbounds [100 x [100 x i16]], ptr %0, i64 0, i64 0, i64 12
28  store <4 x i16> %3, ptr %4, align 8
29  %5 = getelementptr inbounds [100 x [100 x double]], ptr null, i64 0, i64 0, i64 16
30  %wide.load.4 = load <4 x double>, ptr %5, align 16, !invariant.load !0, !noalias !1
31  %6 = fptosi <4 x double> %wide.load.4 to <4 x i16>
32  %7 = getelementptr inbounds [100 x [100 x i16]], ptr %0, i64 0, i64 0, i64 16
33  store <4 x i16> %6, ptr %7, align 8
34  %8 = getelementptr inbounds [100 x [100 x double]], ptr null, i64 0, i64 0, i64 20
35  %wide.load.5 = load <4 x double>, ptr %8, align 16, !invariant.load !0, !noalias !1
36  %9 = fptosi <4 x double> %wide.load.5 to <4 x i16>
37  %10 = getelementptr inbounds [100 x [100 x i16]], ptr %0, i64 0, i64 0, i64 20
38  store <4 x i16> %9, ptr %10, align 8
39  ret void
40}
41
42!0 = !{}
43!1 = !{!2}
44!2 = !{!"buffer: {index:1, offset:0, size:20000}", !3}
45!3 = !{!"XLA global AA domain"}
46