1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mattr=avx < %s | FileCheck %s 3 4define void @extracter0([4 x <4 x i1>] %matrix) nounwind { 5; CHECK-LABEL: extracter0: 6; CHECK: # %bb.0: 7; CHECK-NEXT: push rbp 8; CHECK-NEXT: push r14 9; CHECK-NEXT: push rbx 10; CHECK-NEXT: vpslld xmm0, xmm0, 31 11; CHECK-NEXT: vmovmskps edi, xmm0 12; CHECK-NEXT: mov ebx, edi 13; CHECK-NEXT: shr bl, 3 14; CHECK-NEXT: mov ebp, edi 15; CHECK-NEXT: and bpl, 4 16; CHECK-NEXT: shr bpl, 2 17; CHECK-NEXT: mov r14d, edi 18; CHECK-NEXT: and r14b, 2 19; CHECK-NEXT: shr r14b 20; CHECK-NEXT: call print_i1@PLT 21; CHECK-NEXT: movzx edi, r14b 22; CHECK-NEXT: call print_i1@PLT 23; CHECK-NEXT: movzx edi, bpl 24; CHECK-NEXT: call print_i1@PLT 25; CHECK-NEXT: movzx edi, bl 26; CHECK-NEXT: call print_i1@PLT 27; CHECK-NEXT: pop rbx 28; CHECK-NEXT: pop r14 29; CHECK-NEXT: pop rbp 30; CHECK-NEXT: ret 31 %1 = extractvalue [4 x <4 x i1>] %matrix, 0 32 %2 = extractelement <4 x i1> %1, i64 0 33 %3 = extractelement <4 x i1> %1, i64 1 34 %4 = extractelement <4 x i1> %1, i64 2 35 %5 = extractelement <4 x i1> %1, i64 3 36 call void @print_i1(i1 %2) 37 call void @print_i1(i1 %3) 38 call void @print_i1(i1 %4) 39 call void @print_i1(i1 %5) 40 ret void 41} 42 43define void @extracter1([4 x <4 x i1>] %matrix) nounwind { 44; CHECK-LABEL: extracter1: 45; CHECK: # %bb.0: 46; CHECK-NEXT: push rbp 47; CHECK-NEXT: push r15 48; CHECK-NEXT: push r14 49; CHECK-NEXT: push r13 50; CHECK-NEXT: push r12 51; CHECK-NEXT: push rbx 52; CHECK-NEXT: push rax 53; CHECK-NEXT: vpslld xmm1, xmm1, 31 54; CHECK-NEXT: vmovmskps ebx, xmm1 55; CHECK-NEXT: mov eax, ebx 56; CHECK-NEXT: shr al, 3 57; CHECK-NEXT: mov byte ptr [rsp + 7], al # 1-byte Spill 58; CHECK-NEXT: mov r14d, ebx 59; CHECK-NEXT: and r14b, 4 60; CHECK-NEXT: shr r14b, 2 61; CHECK-NEXT: mov r15d, ebx 62; CHECK-NEXT: and r15b, 2 63; CHECK-NEXT: shr r15b 64; CHECK-NEXT: vpslld xmm0, xmm0, 31 65; CHECK-NEXT: vmovmskps edi, xmm0 66; CHECK-NEXT: mov r12d, edi 67; CHECK-NEXT: shr r12b, 3 68; CHECK-NEXT: mov r13d, edi 69; CHECK-NEXT: and r13b, 4 70; CHECK-NEXT: shr r13b, 2 71; CHECK-NEXT: mov ebp, edi 72; CHECK-NEXT: and bpl, 2 73; CHECK-NEXT: shr bpl 74; CHECK-NEXT: call print_i1@PLT 75; CHECK-NEXT: movzx edi, bpl 76; CHECK-NEXT: call print_i1@PLT 77; CHECK-NEXT: movzx edi, r13b 78; CHECK-NEXT: call print_i1@PLT 79; CHECK-NEXT: movzx edi, r12b 80; CHECK-NEXT: call print_i1@PLT 81; CHECK-NEXT: mov edi, ebx 82; CHECK-NEXT: call print_i1@PLT 83; CHECK-NEXT: movzx edi, r15b 84; CHECK-NEXT: call print_i1@PLT 85; CHECK-NEXT: movzx edi, r14b 86; CHECK-NEXT: call print_i1@PLT 87; CHECK-NEXT: movzx edi, byte ptr [rsp + 7] # 1-byte Folded Reload 88; CHECK-NEXT: call print_i1@PLT 89; CHECK-NEXT: add rsp, 8 90; CHECK-NEXT: pop rbx 91; CHECK-NEXT: pop r12 92; CHECK-NEXT: pop r13 93; CHECK-NEXT: pop r14 94; CHECK-NEXT: pop r15 95; CHECK-NEXT: pop rbp 96; CHECK-NEXT: ret 97 %1 = extractvalue [4 x <4 x i1>] %matrix, 0 98 %2 = extractelement <4 x i1> %1, i64 0 99 %3 = extractelement <4 x i1> %1, i64 1 100 %4 = extractelement <4 x i1> %1, i64 2 101 %5 = extractelement <4 x i1> %1, i64 3 102 call void @print_i1(i1 %2) 103 call void @print_i1(i1 %3) 104 call void @print_i1(i1 %4) 105 call void @print_i1(i1 %5) 106 %6 = extractvalue [4 x <4 x i1>] %matrix, 1 107 %7 = extractelement <4 x i1> %6, i64 0 108 %8 = extractelement <4 x i1> %6, i64 1 109 %9 = extractelement <4 x i1> %6, i64 2 110 %10 = extractelement <4 x i1> %6, i64 3 111 call void @print_i1(i1 %7) 112 call void @print_i1(i1 %8) 113 call void @print_i1(i1 %9) 114 call void @print_i1(i1 %10) 115 ret void 116} 117 118declare void @print_i1(i1) 119