xref: /llvm-project/llvm/test/CodeGen/X86/pr45995-2.ll (revision 726e2c5be556ef01a1f1ada76f87d56ad3c78bb2)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
3
4define <4 x i1> @selecter(i64 %0) {
5; CHECK-LABEL: selecter:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    xor eax, eax
8; CHECK-NEXT:    cmp rdi, 2
9; CHECK-NEXT:    setge al
10; CHECK-NEXT:    lea eax, [rax + 2*rax]
11; CHECK-NEXT:    kmovd k0, eax
12; CHECK-NEXT:    vpmovm2d xmm0, k0
13; CHECK-NEXT:    ret
14  %2 = icmp slt i64 0, %0
15  %3 = select i1 %2, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
16  %4 = insertvalue [4 x <4 x i1>] zeroinitializer, <4 x i1> %3, 0
17  %5 = icmp slt i64 1, %0
18  %6 = select i1 %5, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
19  %7 = insertvalue [4 x <4 x i1>] %4, <4 x i1> %6, 1
20  %8 = icmp slt i64 2, %0
21  %9 = select i1 %8, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
22  %10 = insertvalue [4 x <4 x i1>] %7, <4 x i1> %9, 2
23  %11 = icmp slt i64 3, %0
24  %12 = select i1 %11, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
25  %13 = insertvalue [4 x <4 x i1>] %10, <4 x i1> %12, 3
26  %14 = extractvalue [4 x <4 x i1>] %13, 1
27  ret <4 x i1> %14
28}
29