1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=sse | FileCheck %s 3 4define i32 @test_load(ptr %a) { 5; CHECK-LABEL: test_load: 6; CHECK: ## %bb.0: ## %start 7; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 8; CHECK-NEXT: movaps (%eax), %xmm0 9; CHECK-NEXT: movmskps %xmm0, %eax 10; CHECK-NEXT: retl 11start: 12 %0 = load <4 x i32>, ptr %a, align 16 13 %1 = icmp slt <4 x i32> %0, zeroinitializer 14 %2 = bitcast <4 x i1> %1 to i4 15 %3 = zext i4 %2 to i32 16 ret i32 %3 17} 18 19define i32 @test_bitcast(<4 x float> %a) { 20; CHECK-LABEL: test_bitcast: 21; CHECK: ## %bb.0: ## %start 22; CHECK-NEXT: movmskps %xmm0, %eax 23; CHECK-NEXT: retl 24start: 25 %0 = bitcast <4 x float> %a to <4 x i32> 26 %1 = icmp slt <4 x i32> %0, zeroinitializer 27 %2 = bitcast <4 x i1> %1 to i4 28 %3 = zext i4 %2 to i32 29 ret i32 %3 30} 31 32define i32 @test_and(<4 x float> %a, <4 x float> %b) { 33; CHECK-LABEL: test_and: 34; CHECK: ## %bb.0: ## %start 35; CHECK-NEXT: andps %xmm1, %xmm0 36; CHECK-NEXT: movmskps %xmm0, %eax 37; CHECK-NEXT: retl 38start: 39 %0 = bitcast <4 x float> %a to <4 x i32> 40 %1 = bitcast <4 x float> %b to <4 x i32> 41 %2 = icmp slt <4 x i32> %0, zeroinitializer 42 %3 = icmp slt <4 x i32> %1, zeroinitializer 43 %4 = and <4 x i1> %2, %3 44 %5 = bitcast <4 x i1> %4 to i4 45 %6 = zext i4 %5 to i32 46 ret i32 %6 47} 48 49define i32 @test_or(<4 x float> %a, <4 x float> %b) { 50; CHECK-LABEL: test_or: 51; CHECK: ## %bb.0: ## %start 52; CHECK-NEXT: orps %xmm1, %xmm0 53; CHECK-NEXT: movmskps %xmm0, %eax 54; CHECK-NEXT: retl 55start: 56 %0 = bitcast <4 x float> %a to <4 x i32> 57 %1 = bitcast <4 x float> %b to <4 x i32> 58 %2 = icmp slt <4 x i32> %0, zeroinitializer 59 %3 = icmp slt <4 x i32> %1, zeroinitializer 60 %4 = or <4 x i1> %2, %3 61 %5 = bitcast <4 x i1> %4 to i4 62 %6 = zext i4 %5 to i32 63 ret i32 %6 64} 65 66define i32 @test_xor(<4 x float> %a, <4 x float> %b) { 67; CHECK-LABEL: test_xor: 68; CHECK: ## %bb.0: ## %start 69; CHECK-NEXT: xorps %xmm1, %xmm0 70; CHECK-NEXT: movmskps %xmm0, %eax 71; CHECK-NEXT: retl 72start: 73 %0 = bitcast <4 x float> %a to <4 x i32> 74 %1 = bitcast <4 x float> %b to <4 x i32> 75 %2 = icmp slt <4 x i32> %0, zeroinitializer 76 %3 = icmp slt <4 x i32> %1, zeroinitializer 77 %4 = xor <4 x i1> %2, %3 78 %5 = bitcast <4 x i1> %4 to i4 79 %6 = zext i4 %5 to i32 80 ret i32 %6 81} 82