xref: /llvm-project/llvm/test/CodeGen/X86/pr38795-verifier-error-pr38788.mir (revision cd4b906e183ffa6b78b2f2d062626ee5f54ceba3)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2# RUN: llc -mtriple=i386-unknown-linux-gnu -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s
3
4# Make sure no verifier error is produced from coalescing the identity
5# copy in bb.3 with live out implicit_defs. The value is live out of
6# the block, and the incoming value is a phi def.
7
8---
9name:            pr38795_verifier_error_reduced_1
10tracksRegLiveness: true
11body:             |
12  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_1
13  ; CHECK: bb.0:
14  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
15  ; CHECK-NEXT:   liveins: $eax
16  ; CHECK-NEXT: {{  $}}
17  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $eax
18  ; CHECK-NEXT: {{  $}}
19  ; CHECK-NEXT: bb.1:
20  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
21  ; CHECK-NEXT: {{  $}}
22  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
23  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit undef $eflags
24  ; CHECK-NEXT: {{  $}}
25  ; CHECK-NEXT: bb.2:
26  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
27  ; CHECK-NEXT: {{  $}}
28  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
29  ; CHECK-NEXT: {{  $}}
30  ; CHECK-NEXT: bb.3:
31  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.4(0x40000000)
32  ; CHECK-NEXT: {{  $}}
33  ; CHECK-NEXT:   JCC_1 %bb.5, 4, implicit undef $eflags
34  ; CHECK-NEXT: {{  $}}
35  ; CHECK-NEXT: bb.4:
36  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
37  ; CHECK-NEXT: {{  $}}
38  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[MOV32r0_]]
39  ; CHECK-NEXT: {{  $}}
40  ; CHECK-NEXT: bb.5:
41  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
42  ; CHECK-NEXT: {{  $}}
43  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]]
44  ; CHECK-NEXT:   JMP_1 %bb.1
45  bb.0:
46    liveins: $eax
47    %0:gr32 = COPY $eax
48
49  bb.1:
50    %1:gr32 = IMPLICIT_DEF
51    JCC_1 %bb.3, 4, implicit undef $eflags
52
53  bb.2:
54    %0:gr32 = MOV32r0 implicit-def dead $eflags
55
56  bb.3:
57    %0:gr32 = COPY %0
58    JCC_1 %bb.5, 4, implicit undef $eflags
59
60  bb.4:
61    %1:gr32 = COPY %0
62
63  bb.5:
64    %0:gr32 = COPY killed %1
65    JMP_1 %bb.1
66
67...
68
69# Check for "Instruction ending live segment doesn't read the
70# register" verifier error after coalescing
71# This still failed with a similar error after a preliminary fix was
72# attempted for pr38795_verifier_error_reduced_1
73
74---
75name:            pr38795_verifier_error_reduced_2
76tracksRegLiveness: true
77body:             |
78  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_2
79  ; CHECK: bb.0:
80  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
81  ; CHECK-NEXT: {{  $}}
82  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
83  ; CHECK-NEXT: {{  $}}
84  ; CHECK-NEXT: bb.1:
85  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
86  ; CHECK-NEXT: {{  $}}
87  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
88  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit killed undef $eflags
89  ; CHECK-NEXT: {{  $}}
90  ; CHECK-NEXT: bb.2:
91  ; CHECK-NEXT:   successors: %bb.9(0x80000000)
92  ; CHECK-NEXT: {{  $}}
93  ; CHECK-NEXT:   JMP_1 %bb.9
94  ; CHECK-NEXT: {{  $}}
95  ; CHECK-NEXT: bb.3:
96  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.4(0x40000000)
97  ; CHECK-NEXT: {{  $}}
98  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed undef $eflags
99  ; CHECK-NEXT: {{  $}}
100  ; CHECK-NEXT: bb.4:
101  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
102  ; CHECK-NEXT: {{  $}}
103  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
104  ; CHECK-NEXT:   JMP_1 %bb.6
105  ; CHECK-NEXT: {{  $}}
106  ; CHECK-NEXT: bb.5:
107  ; CHECK-NEXT:   successors: %bb.9(0x80000000)
108  ; CHECK-NEXT: {{  $}}
109  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
110  ; CHECK-NEXT:   JMP_1 %bb.9
111  ; CHECK-NEXT: {{  $}}
112  ; CHECK-NEXT: bb.6:
113  ; CHECK-NEXT:   successors: %bb.8(0x40000000), %bb.7(0x40000000)
114  ; CHECK-NEXT: {{  $}}
115  ; CHECK-NEXT:   JCC_1 %bb.8, 4, implicit killed undef $eflags
116  ; CHECK-NEXT: {{  $}}
117  ; CHECK-NEXT: bb.7:
118  ; CHECK-NEXT:   successors: %bb.8(0x80000000)
119  ; CHECK-NEXT: {{  $}}
120  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[DEF1]]
121  ; CHECK-NEXT: {{  $}}
122  ; CHECK-NEXT: bb.8:
123  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
124  ; CHECK-NEXT: {{  $}}
125  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]]
126  ; CHECK-NEXT:   JMP_1 %bb.1
127  ; CHECK-NEXT: {{  $}}
128  ; CHECK-NEXT: bb.9:
129  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
130  ; CHECK-NEXT: {{  $}}
131  ; CHECK-NEXT:   JMP_1 %bb.6
132  bb.0:
133    %0:gr32 = IMPLICIT_DEF
134
135  bb.1:
136    %1:gr32 = IMPLICIT_DEF
137    JCC_1 %bb.3, 4, implicit killed undef $eflags
138
139  bb.2:
140    %2:gr32 = COPY killed %0
141    JMP_1 %bb.9
142
143  bb.3:
144    JCC_1 %bb.5, 5, implicit killed undef $eflags
145
146  bb.4:
147    %3:gr32 = MOV32r0 implicit-def dead $eflags
148    JMP_1 %bb.6
149
150  bb.5:
151    %2:gr32 = IMPLICIT_DEF
152    JMP_1 %bb.9
153
154  bb.6:
155    JCC_1 %bb.8, 4, implicit killed undef $eflags
156
157  bb.7:
158    %1:gr32 = COPY killed %3
159
160  bb.8:
161    %4:gr32 = COPY killed %1
162    %0:gr32 = COPY killed %4
163    JMP_1 %bb.1
164
165  bb.9:
166    %3:gr32 = COPY killed %2
167    JMP_1 %bb.6
168
169...
170
171# Still failed after patch for first 2 failures
172
173---
174name:            pr38795_verifier_error_reduced_3
175tracksRegLiveness: true
176body:             |
177  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_3
178  ; CHECK: bb.0:
179  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
180  ; CHECK-NEXT: {{  $}}
181  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
182  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
183  ; CHECK-NEXT:   JCC_1 %bb.5, 4, implicit killed undef $eflags
184  ; CHECK-NEXT: {{  $}}
185  ; CHECK-NEXT: bb.1:
186  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.5(0x40000000)
187  ; CHECK-NEXT: {{  $}}
188  ; CHECK-NEXT:   [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
189  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[DEF]]
190  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
191  ; CHECK-NEXT:   JCC_1 %bb.4, 5, implicit killed undef $eflags
192  ; CHECK-NEXT:   JMP_1 %bb.5
193  ; CHECK-NEXT: {{  $}}
194  ; CHECK-NEXT: bb.2:
195  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.3(0x40000000)
196  ; CHECK-NEXT: {{  $}}
197  ; CHECK-NEXT:   TEST32rr undef [[COPY]], [[COPY]], implicit-def $eflags
198  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
199  ; CHECK-NEXT:   JCC_1 %bb.4, 4, implicit killed undef $eflags
200  ; CHECK-NEXT: {{  $}}
201  ; CHECK-NEXT: bb.3:
202  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
203  ; CHECK-NEXT: {{  $}}
204  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[MOV32r0_]]
205  ; CHECK-NEXT: {{  $}}
206  ; CHECK-NEXT: bb.4:
207  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
208  ; CHECK-NEXT: {{  $}}
209  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY [[COPY1]]
210  ; CHECK-NEXT:   JMP_1 %bb.1
211  ; CHECK-NEXT: {{  $}}
212  ; CHECK-NEXT: bb.5:
213  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
214  ; CHECK-NEXT: {{  $}}
215  ; CHECK-NEXT:   JMP_1 %bb.2
216  bb.0:
217    %0:gr32 = IMPLICIT_DEF
218    %1:gr32 = IMPLICIT_DEF
219    JCC_1 %bb.5, 4, implicit killed undef $eflags
220
221  bb.1:
222    %2:gr32 = IMPLICIT_DEF
223    %1:gr32 = COPY killed %0
224    %0:gr32 = MOV32r0 implicit-def dead $eflags
225    JCC_1 %bb.4, 5, implicit killed undef $eflags
226    JMP_1 %bb.5
227
228  bb.2:
229    TEST32rr undef %1, %1, implicit-def $eflags
230    %2:gr32 = IMPLICIT_DEF
231    JCC_1 %bb.4, 4, implicit killed undef $eflags
232
233  bb.3:
234    %2:gr32 = COPY killed %0
235
236  bb.4:
237    %0:gr32 = COPY killed %2
238    JMP_1 %bb.1
239
240  bb.5:
241    JMP_1 %bb.2
242
243...
244