1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4%0 = type { %1 } 5%1 = type { %2 } 6%2 = type { %3 } 7%3 = type { %4 } 8%4 = type { %5 } 9%5 = type { i64, i64, ptr } 10%6 = type { %7, [23 x i8] } 11%7 = type { i8 } 12 13@.str.16 = external dso_local unnamed_addr constant [16 x i8], align 1 14@.str.17 = external dso_local unnamed_addr constant [12 x i8], align 1 15@.str.18 = external dso_local unnamed_addr constant [15 x i8], align 1 16 17declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #0 18 19define void @pr38743(i32 %a0) #1 align 2 { 20; CHECK-LABEL: pr38743: 21; CHECK: # %bb.0: # %bb 22; CHECK-NEXT: # kill: def $edi killed $edi def $rdi 23; CHECK-NEXT: decl %edi 24; CHECK-NEXT: jmpq *.LJTI0_0(,%rdi,8) 25; CHECK-NEXT: .LBB0_2: # %bb5 26; CHECK-NEXT: movzwl .str.17+8(%rip), %eax 27; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp) 28; CHECK-NEXT: movq .str.17(%rip), %rax 29; CHECK-NEXT: jmp .LBB0_4 30; CHECK-NEXT: .LBB0_1: # %bb2 31; CHECK-NEXT: movq .str.16+7(%rip), %rax 32; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp) 33; CHECK-NEXT: movq .str.16(%rip), %rax 34; CHECK-NEXT: jmp .LBB0_4 35; CHECK-NEXT: .LBB0_3: # %bb8 36; CHECK-NEXT: movq .str.18+6(%rip), %rax 37; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp) 38; CHECK-NEXT: movq .str.18(%rip), %rax 39; CHECK-NEXT: .LBB0_4: # %bb12 40; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp) 41; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax 42; CHECK-NEXT: movq %rax, (%rax) 43; CHECK-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 44; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 45; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %edx 46; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %esi 47; CHECK-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi 48; CHECK-NEXT: movb %al, (%rax) 49; CHECK-NEXT: movq %rcx, 1(%rax) 50; CHECK-NEXT: movw %dx, 9(%rax) 51; CHECK-NEXT: movl %esi, 11(%rax) 52; CHECK-NEXT: movb %dil, 15(%rax) 53; CHECK-NEXT: retq 54bb: 55 %tmp = alloca %0, align 16 56 switch i32 %a0, label %bb11 [ 57 i32 1, label %bb2 58 i32 4, label %bb5 59 i32 2, label %bb5 60 i32 3, label %bb8 61 ] 62 63bb2: ; preds = %bb 64 %tmp4 = getelementptr inbounds %6, ptr %tmp, i64 0, i32 1, i64 0 65 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %tmp4, ptr align 1 @.str.16, i64 15, i1 false) 66 br label %bb12 67 68bb5: ; preds = %bb, %bb 69 %tmp7 = getelementptr inbounds %6, ptr %tmp, i64 0, i32 1, i64 0 70 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %tmp7, ptr align 1 @.str.17, i64 10, i1 false) 71 br label %bb12 72 73bb8: ; preds = %bb 74 %tmp10 = getelementptr inbounds %6, ptr %tmp, i64 0, i32 1, i64 0 75 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %tmp10, ptr align 1 @.str.18, i64 14, i1 false) 76 br label %bb12 77 78bb11: ; preds = %bb 79 unreachable 80 81bb12: ; preds = %bb8, %bb5, %bb2 82 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 undef, ptr nonnull align 16 %tmp, i64 24, i1 false) #2 83 ret void 84} 85 86attributes #0 = { argmemonly nounwind } 87attributes #1 = { "target-features"="+sse,+sse2,+sse3,+sse4.2" } 88attributes #2 = { nounwind } 89