xref: /llvm-project/llvm/test/CodeGen/X86/pr36865.ll (revision d24c93cc4107dca68a2760199e970cb04cdeed90)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
3
4define void @main() {
5; CHECK-LABEL: main:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    subq $424, %rsp # imm = 0x1A8
8; CHECK-NEXT:    .cfi_def_cfa_offset 432
9; CHECK-NEXT:    leaq {{[0-9]+}}(%rsp), %rdi
10; CHECK-NEXT:    movl $400, %edx # imm = 0x190
11; CHECK-NEXT:    xorl %esi, %esi
12; CHECK-NEXT:    callq memset@PLT
13; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %eax
14; CHECK-NEXT:    movl (%rax), %ecx
15; CHECK-NEXT:    addl 0, %eax
16; CHECK-NEXT:    addl %ecx, %ecx
17; CHECK-NEXT:    addl %eax, %ecx
18; CHECK-NEXT:    addl {{[0-9]+}}(%rsp), %ecx
19; CHECK-NEXT:    movl %ecx, {{[0-9]+}}(%rsp)
20; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %eax
21; CHECK-NEXT:    movl %eax, %ecx
22; CHECK-NEXT:    imull %eax, %ecx
23; CHECK-NEXT:    subl %ecx, %eax
24; CHECK-NEXT:    movl %eax, (%rax)
25entry:
26  %k = alloca i32, align 4
27  %m = alloca i32, align 4
28  %a = alloca [100 x i32], align 16
29  call void @llvm.memset.p0.i64(ptr nonnull align 16 %a, i8 0, i64 400, i1 false)
30  %arrayidx = getelementptr inbounds [100 x i32], ptr %a, i64 0, i64 34
31  %add = load i32, ptr %k
32  %0 = load i32, ptr null
33  %1 = load i32, ptr undef
34  %2 = load i32, ptr undef
35  %3 = load i32, ptr %arrayidx
36  %4 = load i32, ptr undef
37  %5 = load i32, ptr undef
38  %6 = load i32, ptr undef
39  %7 = load i32, ptr undef
40  %8 = load i32, ptr undef
41  %9 = load i32, ptr undef
42  %10 = load i32, ptr undef
43  %11 = load i32, ptr undef
44  %12 = load i32, ptr undef
45  %13 = load i32, ptr undef
46  %14 = load i32, ptr undef
47  %15 = load i32, ptr undef
48  %add.1 = add i32 %add, %0
49  %add.2 = add i32 %add.1, %1
50  %add.3 = add i32 %add.2, %2
51  %add.4 = add i32 %add.3, %3
52  store i32 %add.4, ptr %k
53  %16 = load i32, ptr %m
54  %mul = mul i32 %16, %16
55  %sub = sub i32 %16, %mul
56  store i32 %sub, ptr undef
57  unreachable
58}
59
60declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #0
61
62attributes #0 = { argmemonly nounwind }
63