xref: /llvm-project/llvm/test/CodeGen/X86/pr36274.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
3
4; This tests is checking for a case where the x86 load-op-store fusion
5; misses a dependence between the fused load and a non-fused operand
6; to the load causing a cycle. Here the dependence in question comes
7; from the carry in input of the adcl.
8
9@vx = external dso_local local_unnamed_addr global <2 x i32>, align 8
10
11define void @pr36274(ptr %somewhere) {
12; CHECK-LABEL: pr36274:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    movl vx+4, %eax
15; CHECK-NEXT:    addl $1, vx
16; CHECK-NEXT:    adcl $0, %eax
17; CHECK-NEXT:    movl %eax, vx+4
18; CHECK-NEXT:    retl
19  %a1  = getelementptr <2 x i32>, ptr @vx, i32 0, i32 1
20  %x1  = load volatile i32, ptr %a1, align 4
21  %x0  = load volatile i32, ptr @vx, align 8
22  %vx0 = insertelement <2 x i32> undef, i32 %x0, i32 0
23  %vx1 = insertelement <2 x i32> %vx0, i32 %x1, i32 1
24  %x = bitcast <2 x i32> %vx1 to i64
25  %add = add i64 %x, 1
26  %vadd = bitcast i64 %add to <2 x i32>
27  %vx1_0 = extractelement <2 x i32> %vadd, i32 0
28  %vx1_1 = extractelement <2 x i32> %vadd, i32 1
29  store i32 %vx1_0, ptr @vx, align 8
30  store i32 %vx1_1, ptr %a1, align 4
31  ret void
32}
33