xref: /llvm-project/llvm/test/CodeGen/X86/pr34421.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-apple-macosx10.13.0 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-apple-macosx10.13.0 | FileCheck %s --check-prefix=X64
4
5define void @thread_selfcounts() noimplicitfloat noredzone nounwind {
6; X86-LABEL: thread_selfcounts:
7; X86:       ## %bb.0: ## %entry
8; X86-NEXT:    subl $44, %esp
9; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
10; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
11; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
12; X86-NEXT:    movl %eax, (%esp)
13; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
14; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
15; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
16; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
17; X86-NEXT:    ud2
18;
19; X64-LABEL: thread_selfcounts:
20; X64:       ## %bb.0: ## %entry
21; X64-NEXT:    subq $40, %rsp
22; X64-NEXT:    movq {{[0-9]+}}(%rsp), %rax
23; X64-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
24; X64-NEXT:    movq %rax, (%rsp)
25; X64-NEXT:    movq %rcx, {{[0-9]+}}(%rsp)
26; X64-NEXT:    ud2
27entry:
28  %counts = alloca [2 x i64], align 16
29  %thread_counts = alloca [3 x i64], align 16
30  %0 = load i64, ptr %thread_counts, align 16
31  store i64 %0, ptr %counts, align 16
32  %arrayidx6 = getelementptr inbounds [3 x i64], ptr %thread_counts, i64 0, i64 1
33  %1 = load i64, ptr %arrayidx6, align 8
34  %arrayidx10 = getelementptr inbounds [2 x i64], ptr %counts, i64 0, i64 1
35  store i64 %1, ptr %arrayidx10, align 8
36  unreachable
37}
38
39