xref: /llvm-project/llvm/test/CodeGen/X86/pr31593.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; RUN: llc < %s -mtriple=x86_64-unknown -mattr=sse4.1 -o /dev/null
2
3; Testcase for PR31593.
4; Revision r291120 introduced a regression and this test started failing
5; because of a 'fatal error in the backend':
6; Cannot select: t14: v2i64 = zero_extend_vector_inreg t18
7; t18: v4i32 = bitcast t17
8;   t17: v2i64,ch = load<LD16[%0](dereferenceable)> t0, FrameIndex:i64<1>, undef:i64
9;     t1: i64 = FrameIndex<1>
10;     t3: i64 = undef
11; In function: _Z3foov
12; This regression was fixed in r291535.
13
14%struct.S = type { <2 x i64> }
15
16declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32)
17define void @_Z3foov() local_unnamed_addr #2 {
18entry:
19  %zero = alloca %struct.S, align 16
20  %e = alloca %struct.S, align 16
21  %s = alloca %struct.S, align 16
22  %0 = load <4 x i32>, ptr %e, align 16
23  %vecext.i = extractelement <4 x i32> %0, i32 0
24  %1 = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> undef, i32 %vecext.i)
25  store <4 x i32> %1, ptr %s, align 16
26  ret void
27}
28attributes #2 = { "target-features"="+sse4.1" }
29